High operation frequency, area efficient & cost effective content addressable memory architecture

A content addressable memory, comprising:

• a data input that, in operation, receives input data;
• an address input that, in operation, receives an input address;
• a first memory that, in operation, receives the input address and retrieves first data stored in the first memory based on the input address;
• a second memory that, in operation, receives the first data and retrieves second data stored in the second memory based on the first data;
• and
• an encoder that, in operation, receives the second data, modifies the second data based on the input address, and stores the modified second data in the second memory.

A method, comprising:

• receiving, by a content addressable memory, input data and an input address, the content addressable memory including a first memory and an encoder;
• selecting, by the first memory, first data based on the input data;
• providing, by the first memory, the first data to the encoder;
• modifying, by the encoder, the first data based on the input address;
• and
• storing the modified first data in to the first memory.