Lightweight checkpoint technique for resilience against soft errors

A method of compiling a critical instruction block, comprising:

• inserting a first store instruction before the critical instruction block to store an initial state of a first register at a preservation memory address;
• identifying a second store instruction to a target memory address;
• inserting a first load instruction prior to the second store instruction to load backup data stored in the target memory address to a memory backup register;
• and
• inserting an error detection block after the second store instruction to check for an error in the second store instruction to the target memory address.

A non-transitory computer-readable medium, configured to adapt a processing device to:

• store an initial state of a first register at a preservation memory address;
• execute an instruction block comprising a store instruction at a target memory address;
• prior to executing the store instruction, preserve backup data stored in the target memory address in a memory backup register;
• after preserving the backup data, store result data from the instruction block at the target memory address;
• and
• check for an error in the result data stored at the target memory address.