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US 2019/0196831 A1Published application
Memory apparatus and method for controlling the same
AssigneeAlibaba Group Holding Limited
InventorsLiang HAN, Xiaowei JIANG, Jian CHEN
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Abstract
The present disclosure provides a memory apparatus comprising a first set of storage blocks operating as a set of read storage blocks in a first computation layer and as a set of write storage blocks in a second computation layer, where the second computation layer follows the first computation layer. The memory apparatus also comprises a second set of storage blocks operating as a set of write storage blocks in the first computation layer and as a set of read storage blocks in the second computation layer.
Claims39
A memory apparatus of at least one core, the memory apparatus comprising:
- a first set of storage blocks configured to operate as a set of read storage blocks in a first computation layer and as a set of write storage blocks in a second computation layer, wherein the second computation layer follows the first computation layer;
- a second set of storage blocks configured to operate as a set of write storage blocks in the first computation layer and as a set of read storage blocks in the second computation layer;
- a first read port communicatively coupled to each storage block of the first and second set of storage blocks and configured to receive operands from a first read storage block of the set of read storage blocks and to provide the received operands to at least one processing unit of the at least one core;
- a second read port communicatively coupled to each storage block of the first and second set of storage blocks and configured to receive one or more operands from a second read storage block of the set of read storage blocks and to provide the received one or more operands to the at least one processing unit of the at least one core;
- and
- a first write port communicatively coupled to each storage block of the first and second set of storage blocks and configured to provide one or more operands to a first write storage block of the set of write storage blocks for storing.
3 more elements
A method for controlling a memory apparatus, the method comprising:
- for a first computational layer:
- selecting a first set of storage blocks to operate as a set of read storage blocks that enable providing operands to at least one processing unit via read ports of the memory apparatus, and
- selecting a second set of storage blocks to operate as a set of write storage blocks that enable receiving operands for storage via write ports of the memory apparatus;
- and
- in a second computational layer that follows the first computational layer:
- selecting the first set of storage blocks to operate as the set of write storage blocks, and
- selecting the second set of storage blocks to operate as the set of read storage blocks.
4 more elements
A system comprising:
- an accelerator comprising a memory apparatus associated with a at least one processing unit, the memory apparatus comprising:
- a first set of storage blocks,
- a second set of storage blocks,
- a set of read ports each communicatively coupled to each storage block of the first and second set of storage blocks, and
- a set of write ports each communicatively coupled to each storage block of the first and second set of storage blocks;
- and
- a host unit configured to compile computer code into a plurality of instructions that:
- for a first computational layer:
- select the first set of storage blocks to operate as a set of read storage blocks that enable providing operands to the at least one processing unit via the set of read ports, and
- select the second set of storage blocks to operate as a set of write storage blocks that enable receiving operands for storage via the set of write ports;
- and
- for a second computational layer that follows the first computation layer:
- select the first set of storage blocks to operate as the set of write storage blocks, and
- select the second set of storage blocks to operate as the set of read storage blocks.
11 more elements
A non-transient computer readable medium that stores a set of instructions that is executable by a memory apparatus to cause the memory apparatus to perform:
- for a first computational layer:
- selecting a first set of storage blocks to operate as a set of read storage blocks that enable providing operands to at least one processing unit via read ports of the memory apparatus, and
- selecting a second set of storage blocks to operate as a set of write storage blocks that enable receiving operands for storage via write ports of the memory apparatus;
- and
- in a second computational layer that follows the first computational layer:
- selecting the first set of storage blocks to operate as the set of write storage blocks, and
- selecting the second set of storage blocks to operate as the set of read storage blocks.
4 more elements
A method for controlling a memory apparatus, the method comprising:
- for a first computation layer:
- operating a first set of storage blocks as a set of read storage blocks that enable providing operands to processing units via read ports of the memory apparatus, and
- operating a second set of storage blocks as a set of write storage blocks that enable receiving operands for storage via write ports of the memory apparatus;
- and
- for a second computation layer that follows the first computation layer:
- operating the first set of storage blocks as the set of write storage blocks, and
- operating the second set of storage blocks as the set of read storage blocks.
4 more elements
Dependencies are inferred from the claim text.