Technologies for adaptive processing of multiple buffers

A compute device for adaptive processing of multiple buffers, the compute device comprising:

• a processor comprising one or more processor cores;
• a buffer queue manager to determine a number of buffers in a buffer queue;
• and
• a buffer processor to:
• determine, based on the number of buffers, whether to process the buffer queue in parallel in a single processor core of the one or more processor cores with single instruction, multiple data (SIMD) instructions;
• process, if the compute device is to process the buffer queue in parallel in the single processor core, two or more buffers in the buffer queue with the SIMD instructions;
• and
• serially process, if the compute device is not to process the buffer queue in parallel with the single processor core, one or more buffers in the buffer queue.

A method for adaptive processing of multiple buffers on a compute device, the method comprising:

• determining, by the compute device, a number of buffers in a buffer queue;
• determining, by the compute device and based on the number of buffers, whether to process the buffer queue in parallel in a single processor core of the compute device with single instruction, multiple data (SIMD) instructions;
• processing, by the compute device and if the compute device is to process the buffer queue in parallel in the single processor core, two or more buffers in the buffer queue with the SIMD instructions;
• and
• serially processing, by the compute device and if the compute device is not to process the buffer queue in parallel with the single processor core, one or more buffers in the buffer queue.

One or more computer-readable media comprising a plurality of instructions stored thereon that, when executed, causes a compute device to:

• determine a number of buffers in a buffer queue;
• determine, based on the number of buffers, whether to process the buffer queue in parallel in a single processor core of one or more processor cores of the compute device with single instruction, multiple data (SIMD) instructions;
• process, if the compute device is to process the buffer queue in parallel in the single processor core, two or more buffers in the buffer queue with the SIMD instructions;
• and
• serially process, if the compute device is not to process the buffer queue in parallel with the single processor core, one or more buffers in the buffer queue.