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AssigneeIntel Corporation
InventorsVENKATESWARA MADDURI, ELMOUSTAPHA OULD-AHMED-VALL, MARK CHARNEY, ROBERT VALENTINE, JESUS CORBAL
Estimating the term…
An apparatus and method for performing sum of absolute differences with accumulation. For example, one embodiment of a processor comprises: a decoder to decode an instruction to generate a decoded instruction; a first source register to store a first plurality of packed bytes; a second source register to store a second plurality of packed bytes; execution circuitry to execute the decoded instruction, the execution circuitry comprising: adder circuitry to determine a difference between each byte in the first source register and a corresponding byte in the second source register, absolute value circuitry to determine an absolute value of each difference, the adder circuitry to add pairs of the absolute values to generate a plurality of temporary results, and extension circuitry to extend the temporary results to temporary words; and accumulator circuitry to add each temporary word to a word from a third source register to generate a plurality of accumulated words; and a destination register to store the accumulated words as packed words.
A processor comprising:
A method comprising:
A machine-readable medium having program code stored thereon which, when executed by a machine, causes the machine to perform the operations of:
Dependencies are inferred from the claim text.