Timing controller based on heap sorting, modem chip including the same, and integrated circuit including the timing controller

An integrated circuit, comprising:

• a processor configured to output a plurality of instructions at different times, wherein each instruction comprises an execution time;
• a timing controller comprising a heap sorting circuit,
• wherein the heap sorting circuit is configured to sort the plurality of instructions received from the processor at different times in an order from an earliest execution time to a latest execution time,
• wherein, when a reference time reaches an execution time of an instruction having an earliest execution time among the plurality of instructions, the timing controller is configured to generate at least one control signal corresponding to the instruction;
• and
• a plurality of function blocks, wherein each function block is configured to operate in response to a corresponding control signal of the at least one control signal generated by the timing controller.

A timing controller, comprising:

• an interface circuit configured to sequentially receive a plurality of instructions from a processor, wherein each instruction comprises an execution time;
• an instruction buffer configured to store one or more instructions having a relatively early execution time of the plurality of instructions;
• a heap sorting circuit configured to sort instructions except the one or more instructions of the plurality of instructions according to execution orders based on heap sorting using the execution time, and store the sorted instructions in a storage area;
• a reference counter configured to generate a reference time by counting a clock signal;
• and
• a signal generator configured to receive an instruction having an earliest execution time of the one or more instructions as a current instruction from the instruction buffer, and when the reference time reaches an execution time of the current instruction, generate a control signal representing an operation time of a function block corresponding to the current instruction.