Low-dropout regulator with load-adaptive frequency compensation

A circuit comprising:

• a pass transistor comprising a gate, a source, and a drain;
• a first transistor comprising a gate connected to the gate of the pass transistor, a source connected to the source of the pass transistor, and a drain;
• a second transistor comprising a gate connected to the gate of the pass transistor, a source connected to the source of the pass transistor, and a drain;
• an error amplifier comprising a first input port, a second input port, and an output port coupled to the gate of the pass transistor;
• a third transistor comprising a drain connected to the drain of the first transistor, a gate connected to the drain of the third transistor, and a source;
• a fourth transistor comprising a gate connected to the gate of the third transistor, a source connected to the source of the third transistor, and a drain;
• a fifth transistor comprising a drain connected to the drain of the fourth transistor, a source connected to the drain of the second transistor, and a gate connected to the drain of the fifth transistor;
• a sixth transistor comprising a gate connected to the gate of the fifth transistor, a source connected to the source of the fifth transistor, and a drain;
• and
• a capacitor having a first terminal connected to the source of the fifth transistor, and a second terminal connected to the first input port of the error amplifier.

A circuit comprising:

• a pass transistor to provide a pass current, the pass transistor comprising a gate, a source, and a drain;
• a first transistor to provide a first bias current, the first transistor comprising a gate connected to the gate of the pass transistor, a source connected to the source of the pass transistor, and a drain;
• a second transistor to provide a second bias current, the second transistor comprising a gate connected to the gate of the pass transistor, a source connected to the source of the pass transistor, and a drain;
• an error amplifier comprising a first input port, a second input port, and an output port coupled to the gate of the pass transistor to modulate the pass current;
• a first mirror current comprising a third transistor and a fourth transistor, the third transistor to have a source-drain current provided by the first bias current;
• a second mirror current comprising a fifth transistor and a sixth transistor, the fifth and fourth transistors to have equal source-drain currents, the sixth transistor comprising a source connected to the drain of the second transistor, and a drain connected to the drain of the pass transistor;
• and
• a capacitor comprising a first terminal connected to the drain of the second transistor, and a first terminal connected to the first input port of the error amplifier.