Manufacturing method of array substrate and its upper electrode line pattern and liquid crystal display panel

A manufacturing method of an electrode line pattern of an array substrate, comprising:

• depositing a buffering film on a substrate;
• forming a photoresist pattern on the substrate, having the buffering film thereon, by a patterning process, wherein an exposed portion of the substrate exposed by the photoresist pattern corresponds to a zone of the electrode line pattern to be formed;
• removing an exposed portion of the buffering film exposed by the photoresist pattern by a dry etching process to form a first buffering layer under the photoresist pattern;
• sequentially depositing a second conductive buffering film and a first copper film on the substrate, having the first buffering layer and the photoresist pattern formed thereon;
• forming the electrode line pattern on an exposed portion of the first copper film on the substrate exposed by the photoresist pattern by an electroplating process, wherein a material of the electrode line pattern is copper, and the electrode line pattern is a gate line and/or a gate, or a data line and/or a source/drain;
• and
• stripping off the photoresist pattern on the substrate and the second conductive buffering layer and the first copper film on the photoresist pattern to form the electrode line pattern intervally disposed in-between the first buffering layer.