Jtag bus communication method and apparatus
AssigneeTexas Instruments Incorporated
InventorLee D. Whetsel
Life of this patent
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Abstract
The present disclosure describes using the JTAG Tap's TMS and/or TCK terminals as general purpose serial Input/Output (I/O) Manchester coded communication terminals. The Tap's TMS and/or TCK terminal can be used as a serial I/O communication channel between; (1) an IC and an external controller, (2) between a first and second IC, or (3) between a first and second core circuit within an IC. The use of the TMS and/or TCK terminal as serial I/O channels, as described, does not effect the standardized operation of the JTAG Tap, since the TMS and/or TCK I/O operations occur while the Tap is placed in a non-active steady state.
Claims7
Communication circuitry comprising:
- (a) a test data in input, a bi-directional test mode select terminal, a test clock input, and a test data out output;
- (b) test access port circuitry including test controller circuitry coupled to the test mode select terminal and the test clock input;
- (c) serial communication circuitry separate from the test access port circuitry, the serial communication circuitry having a serially accessible register through the bi-directional test mode select terminal;
- and
- (d) a counter operable to store a value corresponding to repetition of a serial access by the serial communication circuitry.
Dependencies are inferred from the claim text.