# US 2019/0173875 A1 · Memory device and host device

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- Number: US 2019/0173875 A1
- Document ID: US20190173875A1
- Status: Published application
- Kind: A1
- Application number: 16/204,854
- Filed: 2018-11-29
- Published: 2019-06-06
- Earliest claimed: 2014-12-02
- Assignees: Toshiba Memory Corporation
- Applicants: Toshiba Memory Corporation
- Inventors: Koichi NAGAI; Yuji Kashiwagi
- Web page: https://patentgrep.com/patent/US20190173875A1

## CPC

- H04L 63/0838: {using one-time-passwords}
- G06F 1/3275: {Power saving in memory, e.g. RAM, cache}
- G06F 1/3287: by switching off individual functional units in the computer system
- G06F 3/0622: {in relation to access}
- G06F 3/0623: {in relation to content}
- G06F 3/0658: {Controller construction arrangements}
- G06F 3/0679: {Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]}
- H04L 9/0822: {using key encryption key}
- H04L 9/3228: {One-time or temporary data, i.e. information which is sent for every authentication or authorization, e.g. one-time-password, one-time-token or one-time-key}
- H04L 63/0428: {wherein the data content is protected, e.g. by encrypting or encapsulating the payload}
- H04L 63/0457: {wherein the sending and receiving network entities apply dynamic encryption, e.g. stream encryption (cryptographic mechanisms or cryptographic arrangements for stream encryption H04L9/065)}
- H04L 63/067: {using one-time keys (cryptographic mechanisms or cryptographic arrangements for generation of one-time passwords H04L9/0863)}
- H04L 63/126: {the source of the received data}
- G06F 2212/1052: Security improvement
- H04L 2463/062: applying encryption of the keys
- Y02D 10/00: Energy efficient computing, e.g. low power processors, power management or thermal management
- H04L: TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION (arrangements common to telegraphic and telephonic communication H04M)
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- Y02D: CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE

## Abstract

According to one embodiment, a memory device includes: a nonvolatile semiconductor memory; and a controller which controls the semiconductor memory. The controller includes: a first memory which stores a first key; a second memory which stores a second key; a first generator which generates a third key based on a random number; a second generator which generates a fourth key based on the first key and the third key; and an encryptor which encrypts the second key with the third key. The third key and the encrypted second key are stored in a host device enabled to access the memory device.

## Claims

### Claim at position 1

1: A memory device connectable to a host device, the memory device comprising:
a nonvolatile semiconductor memory; and
a controller which controls the semiconductor memory, wherein the controller includes:
a first memory which stores a first key, the first memory being a nonvolatile memory;
a second memory which stores a second key, the second memory being a volatile memory;
a first generator which generates a third key based on a random number;
a second generator which generates a fourth key based on the first key and the third key; and
an encryptor which encrypts the second key with the fourth key, wherein
the controller transmits the third key and the encrypted second key to the host device in response to first information sent from the host device, the first information indicating that a power supply to the memory device is to be turned off.

### Claim at position 2 (depends on 1)

2: The memory device according to claim 1, wherein the transmitted third key and the transmitted encrypted second key are stored in the host device.

### Claim at position 3 (depends on 1)

3: The memory device according to claim 1, wherein the controller further includes a decryptor,
the second generator generates the fourth key based on the first key and the third key read from the host device, and
the decryptor decrypts the encrypted second key read from the host device based on the fourth key.

### Claim at position 4 (depends on 3)

4: The memory device according to claim 3, wherein, when the power supply to the memory device is turned on, the decryptor decrypts the encrypted second key read from the host device.

### Claim at position 5 (depends on 1)

5: The memory device according to claim 1, wherein the third key is stored in the semiconductor memory.

### Claim at position 6 (depends on 5)

6: The memory device according to claim 5, wherein, when the power supply to the memory device is turned on, the third key read from the host device is compared with the third key read from the semiconductor memory.

### Claim at position 7 (depends on 1)

7: The memory device according to claim 1, wherein the controller further includes a third memory which stores access information on the semiconductor memory, and
the access information is transmitted to the host device before the power supply to the memory device is turned off.

### Claim at position 8 (depends on 7)

8: The memory device according to claim 7, wherein the access information is encrypted by the encryptor, and the encrypted access information is stored in the host device.

### Claim at position 9 (depends on 7)

9: The memory device according to claim 7, wherein
the controller further includes a third generator which generates a digital signature,
the digital signature is attached to the access information, and
the access information with the digital signature attached thereto is stored in the host device.

### Claim at position 10 (depends on 1)

10: The memory device according to claim 1, wherein the third key is a one-time password.

### Claim at position 11 (depends on 1)

11: The memory device according to claim 1, wherein, upon receiving the first information from the host device, the controller allows the encryptor to encrypt the second key.

### Claim at position 12 (depends on 1)

12: The memory device according to claim 1, wherein,
after transmitting the encrypted second key and the third key, the controller transmits second information indicating that preparation for power supply shutdown is completed, to the host device, and
in response to the second information indicating that preparation for power supply shutdown is completed, the power supply is turned off.

### Claim at position 13

13: A method of controlling a memory device including a nonvolatile semiconductor memory, the method comprising:
storing a first key in a first memory being a nonvolatile memory;
storing a second key in a second memory being a volatile memory;
generating a third key based on a random number;
generating a fourth key based on the first key and the third key;
receiving user data sent from a host device;
encrypting the received user data with the second key;
storing the encrypted received user data in the nonvolatile semiconductor memory;
encrypting the second key with the fourth key;
receiving first information sent from the host device, the first information indicating that a power supply to the memory device is to be turned off; and
transmitting the third key and the encrypted second key to the host device in response to the received first information.

### Claim at position 14 (depends on 13)

14: The method according to claim 13, wherein the fourth key is generated based on the first key and the third key read from the host device, and
the method further comprises decrypting the encrypted second key read from the host device based on the fourth key.

### Claim at position 15 (depends on 14)

15: The method according to claim 14, wherein the encrypted second key read from the host device is decrypted when the power supply to the memory device is turned on.

### Claim at position 16 (depends on 13)

16: The method according to claim 13, further comprising storing the third key in the semiconductor memory.

### Claim at position 17 (depends on 16)

17: The method according to claim 16, further comprising comparing the third key read from the host device with the third key read from the semiconductor memory when the power supply to the memory device is turned on.

### Claim at position 18 (depends on 13)

18: The method according to claim 13, further comprising:
generating a digital signature,
attaching the digital signature to access information,
encrypting the access information with the digital signature attached thereto, and
transmitting the encrypted access information to the host device before the power supply to the memory device is turned off.

### Claim at position 19 (depends on 13)

19: The method according to claim 13, wherein the third key is one-time password.

### Claim at position 20 (depends on 13)

20: The method according to claim 13, further comprising:
transmitting second information indicating that preparation for power supply shutdown is completed, to the host device after transmitting the encrypted second key and the third key, the controller,
wherein the power supply is turned off in response to the second information indicating that preparation for power supply shutdown is completed.