# US 2019/0173528 A1 · Low-cost software-defined rfid interrogator with active transmit leakage cancellation > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2019/0173528 A1 - Document ID: US20190173528A1 - Status: Published application - Kind: A1 - Application number: 16/208,904 - Filed: 2018-12-04 - Published: 2019-06-06 - Earliest claimed: 2017-12-04 - Assignees: Superlative Semiconductor, LLC - Applicants: Superlative Semiconductor, LLC - Inventors: Edward A. Keehr - Web page: https://patentgrep.com/patent/US20190173528A1 ## CPC - H04B 5/77: for interrogation - H04B 1/0003: {Software-defined radio [SDR] systems, i.e. systems wherein components typically implemented in hardware, e.g. filters or modulators/demodulators, are implented using software, e.g. by involving an AD or DA conversion stage such that at least part of the signal processing is performed in the digital domain (digital baseband systems H04L25/00; digital modulation/demodulation H04L27/00; CDMA H04B1/707; TDMA H04B7/2643; image transmission H04N5/00)} - H04B 1/38: Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving - H04B: TRANSMISSION ## Abstract An RFID interrogator transceiver with various improvements is proposed. A digital interface element implemented in a field-programmable gate array permits the use of a low-cost, low pin count microcontroller unit to control various integrated circuits within the transceiver both with the complexity afforded by the microcontroller unit and with the speed afforded by the field-programmable gate array. A transmit waveform generation architecture which can store opcodes in a segmented random access memory permits both leisurely loading of information over a digital interface from a low-cost microcontroller unit and fast playback over a wireless interface during low-latency RFID exchanges. Finally, a dual digital second-order resonator infinite-impulse-response filter permits a more hardware efficient channel bandpass filter solution than a finite-impulse-response filter and can be easily adjusted to accommodate RFID backscatter link frequencies and frequency tolerances. ## Claims ### Claim 1 A RFID interrogator transceiver comprising: an antenna; a circuit element comprising a digital control interface, the circuit element being operatively coupled to the antenna; a digital processor operatively coupled to the circuit element, the digital processor comprising: a first subsidiary digital processor operatively coupled to the circuit element through a first digital control interface; and a second subsidiary digital processor operatively coupled to the first subsidiary digital processor through a second digital control interface; and the first subsidiary digital processor comprising a digital interface element which permits information to be exchanged between the first digital control interface and the second digital control interface. ### Claim 2 (depends on 1) The RFID interrogator transceiver of claim 1, wherein the antenna, circuit element, and digital processor are physically attached to form a single physical unit. ### Claim 3 (depends on 1) The RFID interrogator transceiver of claim 1, wherein the first subsidiary digital processor is implemented on a field programmable gate array. ### Claim 4 (depends on 1) The RFID interrogator transceiver of claim 1, wherein the second subsidiary digital processor is a microcontroller unit. ### Claim 5 (depends on 1) The RFID interrogator transceiver of claim 1, wherein the circuit element is a software-defined radio. ### Claim 6 (depends on 1) The RFID interrogator transceiver of claim 1, wherein the circuit element is a digitally tunable capacitor. ### Claim 7 (depends on 1) The RFID interrogator transceiver of claim 1, wherein the second subsidiary digital processor is operatively coupled to a third subsidiary digital processor through a wireless control interface. ### Claim 8 A RFID interrogator transceiver comprising: an antenna; a transmitting element operatively coupled to the antenna; a digital processor operatively coupled to the transmitting element, the digital processor comprising a transmit baseband waveform generator, the transmit baseband waveform generator comprising: a toggle element operatively coupled to the transmitting element; a countdown timer operatively coupled to the toggle element; a symbol-to-count translating element operatively coupled to the countdown timer; a symbol multiplexer operatively coupled to the symbol-to-count translating element; a random access memory organized to contain an arrangement of opcodes operatively coupled to the symbol multiplexer; an address counter operatively coupled to the random access memory; and a finite state machine operatively coupled to the address counter, the random access memory, and the symbol multiplexer, the finite state machine configured to increment the address counter and to interpret opcodes from the random access memory. ### Claim 9 (depends on 8) The RFID interrogator transceiver of claim 8, wherein the antenna, directional coupler, signal source, signal receiver, tunable microwave network, and control unit are physically attached to form a single physical unit. ### Claim 10 (depends on 8) The RFID interrogator transceiver of claim 8, wherein the digital processor also comprises a sigma delta modulator, the sigma delta modulator operatively coupled to the toggle element. ### Claim 11 (depends on 10) The RFID interrogator transceiver of claim 10, wherein the sigma delta modulator is configured to realize a zero in its noise transfer function at the RFID tag return backscatter link frequency. ### Claim 12 (depends on 8) The RFID interrogator transceiver of claim 8, wherein the digital processor also comprises a cyclic redundancy check unit, the cyclic redundancy check unit operatively coupled to both the input and output of the symbol multiplexer. ### Claim 13 (depends on 8) The RFID interrogator transceiver of claim 8, wherein the digital processor also comprises a register configured to accept a 16-bit random number from a data recovery unit. ### Claim 14 (depends on 8) The RFID interrogator transceiver of claim 8, wherein the digital processor also comprises a register configured to accept an RFID tag handle identifier from a data recovery unit. ### Claim 15 A RFID interrogator transceiver comprising: an antenna; a receiving element operatively coupled to the antenna; a digital processor operatively coupled to the receiving element, the digital processor comprising a channel bandpass filter, the channel bandpass filter comprising: a first second-order infinite-impulse-response digital resonator filter operatively coupled to the receiving element and configured at a first resonant frequency; and a second second-order infinite-impulse-response digital resonator filter operatively coupled to the first second-order infinite-impulse-response digital resonator filter and configured at a second resonant frequency. ### Claim 16 (depends on 15) The RFID interrogator transceiver of claim 15, wherein the first resonant frequency is substantially similar to the lowest permissible backscatter link frequency of the tag return signal. ### Claim 17 (depends on 15) The RFID interrogator transceiver of claim 15, wherein the first resonant frequency is substantially similar to the highest permissible backscatter link frequency of the tag return signal. ### Claim 18 (depends on 15) The RFID interrogator transceiver of claim 15, wherein the channel bandpass filter is operative coupled to a clock recovery circuit, the clock recovery circuit comprising: a tristate phase detector; a rotational frequency detector; and a sigma-delta modulator configured to provide an input to a counting element. ### Claim 19 (depends on 18) The RFID interrogator transceiver of claim 18, wherein the counting element is a numerically controlled oscillator. ### Claim 20 (depends on 18) The RFID interrogator transceiver of claim 18, wherein the counting element is a digital counter.