# US 2019/0173433 A1 · Power Amplifier Self-Heating Compensation Circuit

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- Number: US 2019/0173433 A1
- Document ID: US20190173433A1
- Status: Published application
- Kind: A1
- Application number: 16/253,115
- Filed: 2019-01-21
- Published: 2019-06-06
- Earliest claimed: 2017-02-28
- Assignees: pSemi Corporation
- Applicants: pSemi Corporation
- Inventors: Tero Tapio Ranta; Keith Bargroff; Christopher C. Murphy; Robert Mark Englekirk
- Web page: https://patentgrep.com/patent/US20190173433A1

## CPC

- H03F 1/30: Modifications of amplifiers to reduce influence of variations of temperature or supply voltage {or other physical parameters (in differential amplifiers H03F3/45479)}
- G05F 3/26: Current mirrors
- H03F 1/56: Modifications of input or output impedances, not otherwise provided for
- H03F 3/195: in integrated circuits
- H03F 3/213: in integrated circuits
- H03F 3/245: {with semiconductor devices only}
- H03F 3/45076: {characterised by the way of implementation of the active amplifying circuit in the differential amplifier}
- H03F 2200/408: the output amplifying stage of an amplifier comprising three power stages
- H03F 2200/411: the output amplifying stage of an amplifier comprising two power stages
- H03F 2200/447: the amplifier being protected to temperature influence
- H03F 2200/451: the amplifier being a radio frequency amplifier
- H03F 2200/462: the current being sensed
- H03F 2200/468: the temperature being sensed
- H03F 2200/471: the voltage being sensed
- H03F 2200/474: A current mirror being used as sensor
- H03F 2203/45596: the IC comprising one or more biasing resistors
- H03F: AMPLIFIERS
- G05F: SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES

## Abstract

Temperature compensation circuits and methods for adjusting one or more circuit parameters of a power amplifier (PA) to maintain approximately constant Gain versus time during pulsed operation sufficient to substantially offset self-heating of the PA. Some embodiments compensate for PA Gain “droop” due to self-heating using a Sample and Hold (S&H) circuit. The S&H circuit samples and holds an initial temperature of the PA at commencement of a pulse. Thereafter, the S&H circuit generates a continuous measurement that corresponds to the temperature of the PA during the remainder of the pulse. A Gain Control signal is generated that is a function of the difference between the initial temperature and the operating temperature of the PA as the PA self-heats for the duration of the pulse. The Gain Control signal is applied to one or more adjustable or tunable circuits within a PA to offset the Gain droop of the PA.

## Claims

### Claim 1

A method for temperature compensating an integrated circuit, including:
(a) providing at least one sensor located with respect to an amplifier so as to measure the temperature T of the amplifier and generate an output signal representing such temperature T;
(b) providing at least one tracking circuit, each coupled to at least one sensor, configured to capture a temperature T(t=t0) at a time to after the commencement of operation of the amplifier, and to sample a temperature T(t>t0) at times after time to and during operation of the amplifier, the at least one tracking circuit including:
(1) a first differential amplifier having a first input coupled to the output signal of a corresponding sensor, a second input, and an output representing the difference between signals applied to the first input and the second input of the first differential amplifier;
(2) an output switch having a first terminal coupled to the output signal of the first differential amplifier, and having a second terminal configured to be coupled to a bias correction circuit;
(3) a second differential amplifier having a first input coupled to the output signal of the first differential amplifier and the first terminal of the output switch, a second input coupled to the second terminal of the output switch, and an output representing the difference between signals applied to the first input and the second input of the second differential amplifier;
(4) a sampling switch having a first terminal coupled to the output of the second differential amplifier and a second terminal coupled to the second input of the first differential amplifier; and
(5) a storage capacitor coupled to the second input of the first differential amplifier and to the second terminal of the sampling switch;
(c) in a first phase, coupling the output of the first differential amplifier to the storage capacitor and to the second input of the first differential amplifier at least at time t0, such that a charge on the capacitor represents an initial temperature T(t=t0);
(d) in a second phase, coupling the output of the first differential amplifier from the storage capacitor and represents the difference ΔT between (i) the output signal of the corresponding sensor coupled to the first input of the first differential amplifier and representing the temperature T(t>t0), and (ii) the storage capacitor charge coupled to the second input of the first differential amplifier and representing the temperature T(t=t0); and
(e) generating a correction signal as a function of ΔT from the at least one tracking circuit, the correction signal being configured to be coupled to one or more other circuits to adjust one or more circuit parameters of the one or more other circuits sufficient to substantially offset the effect of transient effects during operation of the amplifier.

### Claim 2 (depends on 1)

The method of claim 1, wherein the first differential amplifier is an operational transconductance amplifier.

### Claim 3 (depends on 2)

The method of claim 2, wherein the operational transconductance amplifier includes a resistive digital-to-analog converter for selectively regulating the output of the operational transconductance amplifier.

### Claim 4 (depends on 1)

The method of claim 1, wherein at least one sensor includes a plurality of series-coupled diodes.

### Claim 5 (depends on 1)

The method of claim 1, wherein the second differential amplifier equalizes voltages across the output switch before and after a switching event.

### Claim 6 (depends on 1)

The method of claim 1, further including configuring the correction signal to adjust a bias signal to the amplifier during operation of the amplifier.

### Claim 7 (depends on 1)

The method of claim 1, wherein the transient effects include self-heating of the amplifier during operation of the amplifier.

### Claim 8 (depends on 1)

The method of claim 1, further including:
(a) providing a constant current source for generating a selected average current output; and
(b) providing circuitry for summing the output of the first differential amplifier representing the difference ΔT with the average current output of the constant current source.

### Claim 9 (depends on 1)

The method claim 1, wherein the amplifier includes at least one amplifier stage configured to receive an input radio frequency signal and output an amplified radio frequency signal, and further including coupling the correction signal to and adjusting a bias circuit for one or more amplifier stages to substantially offset the effect of self-heating during operation of the amplifier on the Gain of the amplifier.

### Claim 10 (depends on 1)

The method of claim 1, wherein the amplifier includes:
(a) a main amplifier circuit including a stack of field effect transistors (FETs) having a last FET M0;
(b) a cascode current mirror circuit coupled to the main amplifier circuit, and including a stack of FETs having a last FET Mb0;
(c) a first voltage divider bias circuit, coupled to the stack of FETs of the main amplifier circuit;
(d) a second voltage divider bias circuit, coupled to the stack of FETs of the cascode current mirror circuit; and
(e) a differential amplifier having a first input coupled to a node of the cascode current mirror circuit, a second input coupled to the correction signal from the correction circuit, and an output coupled, directly or indirectly, to bias the last FET M0 and the last FET Mb0.

### Claim 11 (depends on 10)

The method of claim 10, wherein the first voltage divider bias circuit and the second voltage divider bias circuit are the same circuit.

### Claim 12 (depends on 1)

The method of claim 1, wherein the amplifier includes:
(a) a main amplifier circuit including a stack of field effect transistors (FETs) having a last FET M0;
(b) a low-current standby mode circuit;
(c) a cascode current mirror circuit coupled to the main amplifier circuit, and including a stack of FETs having a last FET Mb0;
(d) a first voltage divider bias circuit, coupled to the stack of FETs of the main amplifier circuit;
(e) a second voltage divider bias circuit, coupled to the stack of FETs of the cascode current mirror circuit;
(f) a differential amplifier having a first input, a second input, and an output;
(g) a source follower circuit coupled to the output of the differential amplifier, and outputting a bias signal;
(h) a first switch configured to couple the first input of the differential amplifier to the correction signal of the correction circuit in an active state, and to a low-current resistive divider in a standby state;
(i) a second switch configured to couple the second input of the differential amplifier to a node of the cascode current mirror circuit in an active state, and to node of the low-current standby mode circuit in a standby state; and
(j) a third switch configured to couple the output bias signal of the source follower circuit to the last FET M0 and the last FET Mb0 in an active state, and to set at least one of the main amplifier circuit and the cascode current mirror circuit to an OFF state with respect to input signal amplification in a standby state.

### Claim 13 (depends on 12)

The method of claim 12, wherein the first voltage divider bias circuit and the second voltage divider bias circuit are the same circuit.

### Claim 14

A method for temperature compensating an integrated circuit, including:
(a) configuring a temperature compensated variable current source circuit to monitor the temperature of a target circuit having one or more performance parameters affected by transient effects during operation of the target circuit, for generating a correction signal as a function of a difference ΔT between (i) a temperature T(t>t0) of the target circuit during operation, and (ii) a temperature T(t=t0) of the target circuit at an initial time before operation;
(b) providing a main amplifier circuit including a stack of field effect transistors (FETs) having a last FET M0;
(c) providing a cascode current mirror circuit coupled to the main amplifier circuit, and including a stack of FETs having a last FET Mb0;
(d) providing a first voltage divider bias circuit, coupled to the stack of FETs of the main amplifier circuit;
(e) providing a second voltage divider bias circuit, coupled to the stack of FETs of the cascode current mirror circuit; and
(f) providing a differential amplifier having a first input coupled to a node of the cascode current mirror circuit, a second input coupled to the correction signal, and an output coupled, directly or indirectly, to bias the last FET M0 and the last FET Mb0.

### Claim 15

A method for temperature compensating an integrated circuit, including:
(a) configuring a temperature compensated variable current source circuit to monitor the temperature of a target circuit having one or more performance parameters affected by transient effects during operation of the target circuit, for generating a correction signal as a function of a difference ΔT between (i) a temperature T(t>t0) of the target circuit during operation, and (ii) a temperature T(t=t0) of the target circuit at an initial time before operation;
(b) providing a main amplifier circuit including a stack of field effect transistors (FETs) having a last FET Mo;
(c) providing a low-current standby mode circuit;
(d) providing a cascode current mirror circuit coupled to the main amplifier circuit, and including a stack of FETs having a last FET Mb0;
(e) providing a first voltage divider bias circuit, coupled to the stack of FETs of the main amplifier circuit;
(f) providing a second voltage divider bias circuit, coupled to the stack of FETs of the cascode current mirror circuit;
(g) providing a differential amplifier having a first input, a second input, and an output;
(h) providing a source follower circuit coupled to the output of the differential amplifier, and outputting a bias signal;
(i) providing a first switch configured to couple the first input of the differential amplifier to the correction signal in an active state, and to a low-current resistive divider in a standby state;
(j) providing a second switch configured to couple the second input of the differential amplifier to a node of the cascode current mirror circuit in an active state, and to node of the low-current standby mode circuit in a standby state; and
(k) providing a third switch configured to couple the output bias signal of the source follower circuit to the last FET Mo and the last FET Mb0 in an active state, and to set at least one of the main amplifier circuit and the cascode current mirror circuit to an OFF state with respect to input signal amplification in a standby state.