# US 2019/0173400 A1 · Controlling multiple facets of duty cycle response using a single motor integrated circuit pin > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2019/0173400 A1 - Document ID: US20190173400A1 - Status: Published application - Kind: A1 - Application number: 16/269,677 - Filed: 2019-02-07 - Published: 2019-06-06 - Earliest claimed: 2016-06-17 - Assignees: Semiconductor Components Industries, LLC - Applicants: Semiconductor Components Industries, LLC - Inventors: Takashi OGAWA; Fumio KUMAZAWA - Web page: https://patentgrep.com/patent/US20190173400A1 ## CPC - H02P 6/14: Electronic commutators - H02P 6/24: Arrangements for stopping - H02P 27/08: with pulse width modulation - H02P: CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS ## Abstract A system, in some embodiments, includes: a motor; and control logic, coupled to the motor, to determine a duty keep status and a duty cycle threshold based on a received voltage, wherein the duty keep status indicates whether the system is to operate in a duty keep mode or a stop mode, wherein the duty cycle threshold indicates a minimum duty cycle for the motor if the system operates in said duty keep mode and indicates an input duty cycle threshold below which the control logic shuts off the motor if the system operates in the stop mode. ## Claims ### Claim 1 A system for controlling a motor, the system comprising: a motor driver coupled to an output of a motor integrated circuit (IC), the motor IC comprising: a control logic configured to receive a voltage signal; a pulse-width-modulation (PWM) logic coupled with the control logic, the control logic configured to receive a PWM input signal; and a motor controller coupled to an output of the control logic; wherein the control logic is configured to generate a keep status and a duty cycle threshold based upon the voltage signal; and wherein the keep status comprises one of a keep mode or a stop mode. ### Claim 2 (depends on 1) The system of claim 1, wherein the control logic is configured to send a stop signal if the control logic generates the stop mode and if the PWM input signal is less than the duty cycle threshold. ### Claim 3 (depends on 1) The system of claim 1, wherein the motor IC receives the voltage signal through a single input pin. ### Claim 4 (depends on 1) The system of claim 1, wherein the control logic comprises a set of voltage values and a corresponding set of duty cycle threshold values. ### Claim 5 (depends on 4) The system of claim 4, wherein a plurality of consecutive voltage values correspond to a single duty cycle threshold value. ### Claim 6 (depends on 4) The system of claim 4, wherein the set of voltage values and the set of duty cycle threshold values comprise a first portion corresponding to the keep mode and a second portion corresponding to the stop mode. ### Claim 7 (depends on 6) The system of claim 6, wherein the voltage signal corresponds with one of the first portion or the second portion. ### Claim 8 A motor integrated circuit comprising: a control logic configured to receive a voltage signal; and a pulse-width-modulation (PWM) logic coupled to the control logic, the control logic configured to receive a PWM input signal from the PWM logic; wherein the control logic is configured to generate a keep status and a duty cycle threshold based upon the voltage signal, the keep status comprising one of a stop mode or a keep mode; and wherein the control logic is configured to send a stop signal to a motor controller if the control logic generates the stop mode and if the PWM input signal is less than the duty cycle threshold. ### Claim 9 (depends on 8) The circuit of claim 8, wherein the control logic is configured to output a signal to maintain motor rotation if the control logic generates the keep mode. ### Claim 10 (depends on 8) The circuit of claim 8, wherein the control logic comprises a processor configured to receive the PWM input signal and the voltage signal. ### Claim 11 (depends on 8) The circuit of claim 8, wherein the circuit comprises the motor controller coupled to the control logic. ### Claim 12 (depends on 8) The circuit of claim 8, wherein the control logic comprises a set of voltage values and a set of duty cycle threshold values. ### Claim 13 (depends on 12) The system of claim 12, wherein a plurality of consecutive voltage values correspond to a single duty cycle threshold value. ### Claim 14 (depends on 12) The system of claim 12, wherein the set of voltage values and the set of duty cycle threshold values comprise a first portion corresponding to the keep mode and a second portion corresponding to the stop mode. ### Claim 15 (depends on 14) The system of claim 14, wherein the voltage signal corresponds with one of the first portion or the second portion. ### Claim 16 A method of controlling a motor, the method comprising: receiving, at a control logic, a voltage signal, the control logic comprising a set of voltage values and a set of duty cycle values; calculating, using the control logic, a keep status and a duty cycle threshold based on the voltage signal, the set of voltage values, and the set of duty cycle values, wherein the keep status comprises one of a keep mode or a stop mode; receiving, at the control logic, a pulse-width-modulation (PWM) input signal from a PWM logic; and sending one of a stop signal or an output signal to a motor controller indicating that a motor is to continue rotating. ### Claim 17 (depends on 16) The method of claim 16, further comprising converting the voltage signal using an analog-to-digital converter. ### Claim 18 (depends on 16) The method of claim 16, wherein calculating comprises comparing the voltage signal to the set of voltage values comprised in the control logic. ### Claim 19 (depends on 16) The method of claim 16, wherein the set of voltage values corresponds to a set of duty cycle thresholds. ### Claim 20 (depends on 16) The method of claim 16, wherein the keep status and the duty cycle threshold are calculated without using the PWM input signal.