# US 2019/0173380 A1 · Variable Frequency Soft-Switching Control of a Buck Converter

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- Number: US 2019/0173380 A1
- Document ID: US20190173380A1
- Status: Published application
- Kind: A1
- Application number: 16/248,373
- Filed: 2019-01-15
- Published: 2019-06-06
- Earliest claimed: 2016-03-24
- Assignees: NVIDIA Corporation
- Applicants: NVIDIA Corporation
- Inventors: Sudhir Shrikantha Kudva; William J. Dally; Thomas Hastings Greer, III; Carl Thomas Gray
- Web page: https://patentgrep.com/patent/US20190173380A1

## CPC

- H02M 3/158: including plural semiconductor devices as final control devices for a single load
- H02M 1/08: Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
- H02M 3/156: with automatic control of output voltage or current, e.g. switching regulators
- H02M 1/0009: {Devices or circuits for detecting current in a converter}
- H02M 1/0019: {the disturbance parameters being load current fluctuations}
- H02M 3/1566: {with means for compensating against rapid load changes, e.g. with auxiliary current source, with dual mode control or with inductance variation}
- H02M 3/157: with digital control
- H02M: APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF (transformers H01F; dynamo-electric converters H02K47/00; controlling transformers, reactors or choke coils, control or regulation of electric motors, generators or dynamo-electric converters H02P)

## Abstract

A system and method are provided for controlling a modified buck converter circuit. A pull-up switching mechanism that is coupled to an upstream terminal of an inductor within a modified buck converter circuit is enabled. A load current at the output of the modified buck regulator circuit is measured. A capacitor current associated with a capacitor that is coupled to a downstream terminal of the inductor is continuously sensed and the pull-up switching mechanism is disabled when the capacitor current is greater than a sum of the load current and an enabling current value.

## Claims

### Claim 1

A modified buck regulator circuit, comprising:
a pull-up switching mechanism;
a pull-down switching mechanism that is coupled to the pull-up switching mechanism;
an inductor having an upstream end that is coupled between the pull-up switching mechanism and the pull-down switching mechanism;
a capacitor that is coupled to a downstream end of the inductor and in parallel with the pull-down switching mechanism; and
a controller circuit that is coupled to the pull-up switching mechanism and the pull-down switching mechanism and configured to:
measure a load current at an output of the modified buck converter circuit;
determine, based on the load current, a time duration during which the pull-up switching mechanism is enabled;
enable the pull-up switching mechanism for the time duration; and
disable the pull-up switching mechanism after the time duration.

### Claim 2 (depends on 1)

The modified buck regulator circuit of claim 1, wherein the time duration is a product of an inductance of the inductor divided by a high supply voltage and twice a sum of the load current and a enabling current value.

### Claim 3 (depends on 2)

The modified buck regulator circuit of claim 2, wherein the enabling current value is an amount of current flowing from the downstream terminal of the inductor to the upstream terminal of the inductor needed to enable the pull-up switching mechanism in a soft-switching mode.

### Claim 4 (depends on 1)

The modified buck regulator circuit of claim 1, wherein the time duration is determined by performing a look-up operation in a look-up table using the measured load current.

### Claim 5 (depends on 1)

The modified buck regulator circuit of claim 1, wherein the controller is further configured to, after disabling the pull-up switching mechanism, wait a non-overlap time duration to enable the pull-down switching mechanism.

### Claim 6 (depends on 5)

The modified buck regulator circuit of claim 5, wherein the non-overlap time duration is calibrated during a previous operating cycle of the modified buck regulator circuit.

### Claim 7 (depends on 6)

The modified buck regulator circuit of claim 6, wherein the calibration comprises decreasing the non-overlap time duration when a voltage at the upstream terminal falls below a low supply voltage before the pull-down switching mechanism is enabled.

### Claim 8 (depends on 6)

The modified buck regulator circuit of claim 6, wherein the calibration comprises increasing the non-overlap time duration when the pull-down switching mechanism is enabled before a voltage at the upstream terminal falls below a low supply voltage.

### Claim 9 (depends on 1)

The modified buck regulator circuit of claim 1, wherein the controller circuit is further configured to, prior to enabling the pull-up switching mechanism:
disable the pull-down switching mechanism; and
wait a non-overlap time duration before enabling the pull-up switching mechanism.

### Claim 10 (depends on 9)

The modified buck regulator circuit of claim 9, wherein the non-overlap time duration is calibrated during a previous operating cycle of the modified buck regulator circuit.

### Claim 11 (depends on 10)

The modified buck regulator circuit of claim 10, wherein the calibration comprises increasing the non-overlap time duration when the pull-up switching mechanism is enabled before a voltage at the upstream terminal rises to a high supply voltage.

### Claim 12 (depends on 10)

The modified buck regulator circuit of claim 10, wherein the calibration comprises decreasing the non-overlap time duration when a voltage at the upstream terminal rises to a high supply voltage before the pull-up switching mechanism is enabled.

### Claim 13 (depends on 1)

The modified buck regulator circuit of claim 1, wherein the controller circuit is further configured to disable the pull-down switching mechanism when the output voltage is less than a reference voltage.

### Claim 14 (depends on 2)

The modified buck regulator circuit of claim 2, wherein a peak-to-peak ripple of current through the inductor is twice the sum of the load current and the enabling current value.
