# US 2019/0172995 A1 · Pressure sensor and manufacturing method thereof > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2019/0172995 A1 - Document ID: US20190172995A1 - Status: Published application - Kind: A1 - Application number: 16/163,934 - Filed: 2018-10-18 - Published: 2019-06-06 - Earliest claimed: 2017-12-05 - Assignees: Korea Electronics Technology Institute - Applicants: Korea Electronics Technology Institute - Inventors: Suk Won JUNG; Nam Kyu CHO - Web page: https://patentgrep.com/patent/US20190172995A1 ## CPC - H10N 30/704: {based on piezoelectric or electrostrictive films or coatings} - G01L 9/0042: {Constructional details associated with semiconductive diaphragm sensors, e.g. etching, or constructional details of non-semiconductive diaphragms (details about the integration or bonding of piezoresistor in or on the diaphragm G01L9/0052 and G01L9/0057 respectively)} - G01L 9/0055: {bonded on a diaphragm} - H10D 48/50: Devices controlled by mechanical forces, e.g. pressure - H10D 62/119: {Nanowire, nanosheet or nanotube semiconductor bodies} - H10N 30/093: Forming inorganic materials - H10N 30/302: {Sensors} - H10N: ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR - G01L: MEASURING FORCE, STRESS, TORQUE, WORK, MECHANICAL POWER, MECHANICAL EFFICIENCY, OR FLUID PRESSURE (weighing G01G) - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES ## Abstract Disclosed is a silicon nanowire pressure sensor including a lower substrate with a diaphragm recess in a lower surface thereof, an upper substrate having a first surface attached to an upper surface of the lower substrate, silicon nanowires formed on the first surface of the upper substrate, resistive portions exposed on a second surface of the upper substrate, and a diaphragm region formed by etching a center portion of the second surface of the upper substrate so as to be aligned with the resistive portions, in which the diaphragm recess is larger than the diaphragm region. ## Claims ### Claim 1 A silicon nanowire pressure sensor comprising: a lower substrate having a diaphragm recess in a lower surface thereof; an upper substrate having a first surface attached to an upper surface of the lower substrate; a resistive portion including a silicon nanowire formed on a first surface of the upper substrate and exposed on a second surface of the upper substrate; and a diaphragm region formed by etching a center portion of the second surface of the upper substrate with alignment reference of the resistive portions, wherein the diaphragm recess is larger than the diaphragm region. ### Claim 2 (depends on 1) The silicon nanowire pressure sensor according to claim 1, wherein a plurality of silicon blocks is formed on the second surface of the upper substrate to be spaced from each other by locally etching the second surface of the upper substrate and electrically connected only via the resistive portion, wherein side walls of a part of the silicon blocks constitute a boundary of the diaphragm region. ### Claim 3 (depends on 2) The silicon nanowire pressure sensor according to claim 2, wherein the resistive portion resistive portions formed inside the diaphragm region and second resistive portions formed outside the diaphragm region. ### Claim 4 (depends on 3) The silicon nanowire pressure sensor according to claim 3, wherein the number of silicon blocks is four and the four silicon blocks are positioned in four quadrants of the upper substrate respectively, the number of the first resistive portions is two and the two first resistive portions are disposed at boundaries of the quadrants so as to be spaced from each other with respect to the center of the upper substrate, and the two first resistive portions electrically connect two adjacent silicon blocks to each other among the four silicon blocks, the number of second resistive portions is two and the two second resistive portions are disposed at boundaries of the quadrants so as to be spaced from each other with respect to the center of the upper substrate in a direction perpendicular to the direction in which the first resistive portions are spaced, and the two second resistive portions electrically connect two adjacent silicon blocks to each other among the four silicon blocks. ### Claim 5 (depends on 4) The silicon nanowire pressure sensor according to claim 4, further comprising electrodes formed on the respective silicon blocks. ### Claim 6 A method of manufacturing a silicon nanowire pressure sensor, the method comprising: a first step of preparing an upper substrate on which resistive portions including silicon nanowires are formed; a second step of preparing a lower substrate; a third step of attaching a first surface of the upper substrate to an upper surface of the lower substrate; a fourth step of etching a center portion of a second surface of the upper substrate with alignment reference of the resistive portions; and a fifth step of etching a lower surface of the lower substrate to form a diaphragm recess that is larger than the diaphragm region. ### Claim 7 (depends on 6) The method according to claim 6, wherein the fourth step comprises partially removing the upper substrate from the second surface by a thickness to leave the upper substrate having a predetermined thickness; forming an electrode on the second surface of the upper substrate; and performing an insulation step of etching a center portion of the second surface of the upper substrate with alignment reference of the resistive portion so that a part of side walls of a plurality of silicon blocks that are formed when the resistive portion is exposed on the second substrate of the upper substrate are disposed at boundaries of the diaphragm region and the adjacent silicon blocks are electrically connected only via the resistive portion. ### Claim 8 (depends on 6) The method according to claim 6, wherein the second step is a step of preparing the lower substrate having a second surface in which a doped region is formed, and the fifth step is a step of foaming the diaphragm recess by etching a first surface of the lower substrate until reaching a position near the doped region by stopping the etching when a predetermined condition is met in which the etching rate is considerably reduced, so that the lower substrate has a uniform thickness in a region in which the diaphragm recess is formed. ### Claim 9 (depends on 7) The method according to claim 7, wherein in the first step, the resistive portion includes a first resistive portion and a second resistive portion, wherein in the insulation step, the second surface of the upper substrate is etched such that the first resistive portion is formed inside the diaphragm region and the second resistive portion is formed outside the diaphragm region.