# US 2019/0172944 A1 · Semiconductor device and method of manufacturing same

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 2019/0172944 A1
- Document ID: US20190172944A1
- Status: Published application
- Kind: A1
- Application number: 16/182,199
- Filed: 2018-11-06
- Published: 2019-06-06
- Earliest claimed: 2017-12-06
- Assignees: Fuji Electric Co., Ltd.
- Applicants: Fuji Electric Co., Ltd.
- Inventors: Keiji OKUMURA
- Web page: https://patentgrep.com/patent/US20190172944A1

## CPC

- H10D 30/668: {having trench gate electrodes, e.g. UMOS transistors}
- H10D 12/031: {of IGBTs}
- H10D 12/038: {having a recessed gate, e.g. trench-gate IGBTs}
- H10D 12/481: {having gate structures on slanted surfaces, on vertical surfaces, or in grooves, e.g. trench gate IGBTs}
- H10D 30/0297: {using recessing of the gate electrodes, e.g. to form trench gate electrodes}
- H10D 30/665: {having edge termination structures}
- H10D 62/104: {having particular shapes of the bodies at or near reverse-biased junctions, e.g. having bevels or moats}
- H10D 62/106: {having supplementary regions doped oppositely to or in rectifying contact with regions of the semiconductor bodies, e.g. guard rings with PN or Schottky junctions}
- H10D 62/107: {Buried supplementary regions, e.g. buried guard rings (multi-RESURF H10D62/111)}
- H10D 62/112: {for preventing surface leakage due to surface inversion layers, e.g. by using channel stoppers}
- H10D 62/153: {Impurity concentrations or distributions}
- H10D 62/154: {Dispositions}
- H10D 62/157: {Impurity concentrations or distributions}
- H10D 62/393: {Body regions of DMOS transistors or IGBTs (cell layout of DMOS H10D62/127)}
- H10D 62/8325: {Silicon carbide}
- H10D 64/513: {within recesses in the substrate, e.g. trench gates, groove gates or buried gates}
- H10P 30/2042: {into crystalline silicon carbide}
- H10P 30/21: {of electrically active species}
- H10D 62/60: Impurity distributions or concentrations
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

A semiconductor device includes a current spreading region of the first conductivity type provided on a drift layer and having a higher impurity density than the drift layer; a base region of a second conductivity type provided on the current spreading region; a base contact region of the second conductivity type provided in a top part of the base region and having a higher impurity density than the base region; and an electrode contact region of the first conductivity type provided in a top part of the base region that is laterally in contact with the base contact region, the electrode contact region having a higher impurity density than the drift layer, wherein a density of a second conductivity type impurity element in the base contact region is at least two times as much as a density of a first conductivity type impurity element in the electrode contact region.

## Claims

### Claim 1

A semiconductor device, comprising:
a drift layer of a first conductivity type;
a current spreading region of the first conductivity type provided on the drift layer and having a higher impurity density than the drift layer;
a base region of a second conductivity type provided on the current spreading region;
a base contact region of the second conductivity type provided in a top part of the base region and having a higher impurity density than the base region; and
an electrode contact region of the first conductivity type provided in a top part of the base region that is laterally in contact with the base contact region, the electrode contact region having a higher impurity density than the drift layer,
wherein a density of a second conductivity type impurity element in the base contact region is at least two times as much as a density of a first conductivity type impurity element in the electrode contact region.

### Claim 2 (depends on 1)

The semiconductor device according to claim 1, wherein the base contact region contains, in addition to the second conductivity type impurity element, said first conductivity type impurity element in a same amount as an amount of the first conductivity type element contained in the electrode contact region, and a density of the first conductivity type impurity element in the base contact region is lower than the density of the second conductivity type impurity element in the base contact region.

### Claim 3 (depends on 1)

The semiconductor device according to claim 1, wherein the semiconductor device has a termination section at a periphery of the device, the termination section having a mesa structure including a mesa inclined surface exposing a lateral end of the base contact region and a lateral end of the base region.

### Claim 4 (depends on 3)

The semiconductor device according to claim 3, further comprising a relaxation region of the second conductivity type having a higher impurity density than the base region and contacting a bottom surface of the base region, said mesa inclined surface exposing at least a portion of a lateral end of the relaxation region.

### Claim 5 (depends on 3)

The semiconductor device according to claim 3, further comprising a mesa bottom surface layer of the first conductivity type laterally in contact with the relaxation region, a top surface of the mesa bottom surface layer defining at least a portion of a bottom of the mesa structure.

### Claim 6 (depends on 5)

The semiconductor device according to claim 5, wherein the mesa bottom surface layer includes a junction termination extension region.

### Claim 7 (depends on 5)

The semiconductor device according to claim 5, further comprising a channel stopper region of the first conductivity type with a higher impurity density than the mesa bottom surface layer adjacent to the mesa bottom surface layer and reaching an outer edge of the mesa structure, a top surface of the channel stopper region defining a portion of a bottom of the mesa bottom surface layer.

### Claim 8 (depends on 7)

The semiconductor device according to claim 7, wherein a depth from a top surface of the base contact region to a bottom of the current spreading region is the same as a depth from a top surface of the base contact region in the termination region to a bottom of the channel stopper region.

### Claim 9 (depends on 7)

The semiconductor device according to claim 7, wherein an impurity density of the current spreading region is the same as an impurity density of the channel stopper region.

### Claim 10

A method of manufacturing a semiconductor device, the method comprising:
epitaxially growing a first epitaxial layer of a first conductivity type on a top surface of a drift layer of the first conductivity type;
selectively implanting impurity ions of the first conductivity type into the first epitaxial layer so as to be of a higher impurity density than a impurity density of the first epitaxial layer, thereby forming a current spreading region in an active region and forming a channel stopper region on an outer edge of a termination region surrounding the active region;
epitaxially growing a base region of a second conductivity type on the first epitaxial layer;
selectively implanting second conductivity type impurity ions into the base region, thereby selectively embedding a base contact region of the second conductivity type in a top part of the base region with a higher impurity density than the base region; and
implanting first conductivity type impurity ions into an entire surface of the base region including the embedded base contact region at a dosage lower than a dosage of the second conductivity type impurity ions implanted to form the base contact region, thereby forming an electrode contact region of the first conductivity type in a top part of the base region that is laterally in contact with the base contact region.

### Claim 11 (depends on 10)

The method according to claim 10, wherein the dosage of the second conductivity type impurity ions in the implantation of the second conductivity type impurity ions into the base region is at least two times as much as the dosage of the first conductivity type impurity ions in the implantation of the first conductivity type impurity ions into the entire surface of the base region.