# US 2019/0172913 A1 · Method for Forming a Semiconductor Structure and a Semiconductor Structure Manufactured Thereof > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2019/0172913 A1 - Document ID: US20190172913A1 - Status: Published application - Kind: A1 - Application number: 16/171,627 - Filed: 2018-10-26 - Published: 2019-06-06 - Earliest claimed: 2017-12-05 - Assignees: Imec Vzw - Applicants: Imec Vzw - Inventors: Hu Liang; Xiuju Zhou; Geert Eneman - Web page: https://patentgrep.com/patent/US20190172913A1 ## CPC - H10D 62/8503: {Nitride Group III-V materials, e.g. AlN or GaN} - H10D 30/015: {of FETs having heterojunction interface channels or heterojunction gate electrodes, e.g. HEMT} - H10D 30/024: {of fin field-effect transistors [FinFET]} - H10D 30/47: having two-dimensional [2D] charge carrier gas channels, e.g. nanoribbon FETs or high electron mobility transistors [HEMT] - H10D 30/62: Fin field-effect transistors [FinFET] - H10D 30/6211: {having fin-shaped semiconductor bodies integral with the bulk semiconductor substrates} - H10D 62/405: {Orientations of crystalline planes} - H10D 62/83: being Group IV materials, e.g. B-doped Si or undoped Ge - H10D 84/0158: {the components including FinFETs} - H10D 84/038: {using silicon technology, e.g. SiGe} - H10H 20/01335: {the light-emitting regions comprising nitride materials} - H10H 20/0137: {the light-emitting regions comprising nitride materials} - H10H 20/825: containing nitrogen, e.g. GaN - H10P 14/271: {characterised by the preparation of substrate for selective deposition} - H10P 14/276: {Lateral overgrowth} - H10P 14/2901: {Materials} - H10P 14/2905: {Silicon, silicon germanium or germanium} - H10P 14/2925: {Surface structures} - H10P 14/2926: {Crystal orientations} - H10P 14/3414: {being group IIIA-VIA materials} - H10D 12/211: {Gated diodes} - H10D 30/475: {having wider bandgap layer formed on top of lower bandgap active layer, e.g. undoped barrier HEMTs such as i-AlGaN/GaN HEMTs} - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES - H10H: INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS - H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10 ## Abstract A semiconductor structure and a method for forming the semiconductor structure are provided. The method includes: providing a monocrystalline substrate having an upper surface covered with a masking layer comprising at least one opening exposing the upper surface; filling the opening by epitaxially growing therein a first layer comprising a first Group III-nitride compound; and growing the first layer further above the opening and on the masking layer by epitaxial lateral overgrowth, wherein the at least one opening has a top surface defined by three or more straight edges forming a polygon parallel to the upper surface and oriented in such a way with respect to the crystal lattice of the monocrystalline substrate so as to permit the epitaxial lateral overgrowth of the first layer in a direction perpendicular to at least one of the edges, thereby forming the semiconductor structure as an elongated structure. ## Claims ### Claim 1 A method for forming a semiconductor structure comprising an elongated structure, the method comprising: providing a monocrystalline substrate having an upper surface covered with a masking layer, the masking layer comprising at least one opening exposing the upper surface; filling the opening by epitaxially growing therein a first layer comprising a first Group III-nitride compound; and growing the first layer further above the opening and on the masking layer by epitaxial lateral overgrowth to form an elongated structure, wherein the at least one opening has a top surface defined by three or more straight edges forming a polygon parallel to the upper surface and oriented in such a way with respect to a crystal lattice of the monocrystalline substrate so as to permit the epitaxial lateral overgrowth of the first layer in a direction perpendicular to at least one of the three or more straight edges, thereby forming the elongated structure. ### Claim 2 (depends on 1) The method according to claim 1, wherein the at least one of the three or more straight edges forming the polygon makes an angle of at most 10° with a crystalline plane of the crystal lattice, perpendicular to the upper surface, and belonging to a family of crystalline planes having Miller indices {1-10}. ### Claim 3 (depends on 1) The method according to claim 1, wherein the at least one of the three or more straight edges forming the polygon is parallel to a crystalline plane of the crystal lattice, perpendicular to the upper surface, and belonging to a family of crystalline planes characterized by Miller indices {1-10}. ### Claim 4 (depends on 1) The method according to claim 1, wherein the at least one opening comprises two or more collinear openings, wherein the at least one of the three or more edges of each opening is oriented in a direction perpendicular to which the first layer can grow and is parallel to, and facing an edge of a neighboring opening oriented in a direction perpendicular to which the first layer can grow. ### Claim 5 (depends on 4) The method according to claim 4, wherein said facing edges have the same length. ### Claim 6 (depends on 1) The method according to claim 1, wherein the at least one opening comprises a plurality of openings arranged in the form of a regular pattern, said plurality of openings comprising said two or more collinear openings. ### Claim 7 (depends on 1) The method according to claim 1, wherein the monocrystalline substrate is a silicon substrate. ### Claim 8 (depends on 1) The method according to claim 1, wherein the upper surface of the monocrystalline substrate is parallel to the crystalline plane of the crystal lattice belonging to a family of crystalline planes characterized by Miller indices {111}, {110}, or {001}, wherein the crystal lattice is a cubic Bravais lattice. ### Claim 9 (depends on 1) The method according to claim 1, wherein the monocrystalline substrate further comprises, on the upper surface, a nucleation layer comprising a second Group III-nitride compound. ### Claim 10 (depends on 1) The method according to claim 1, wherein the first Group III-nitride compound is selected from AlN, GaN, InN, AlGaN, AlInN, and GaInN. ### Claim 11 (depends on 1) The method according to claim 1, wherein the first Group III-nitride compound is GaN. ### Claim 12 (depends on 1) A method of manufacturing a fin-type field effect transistor comprising: forming the semiconductor structure comprising the elongated structure according to the method of claim 1; providing, conformally on the elongated structure, a third layer comprising a third Group III-nitride compound; and forming, in-situ with the third layer, a fourth layer on the third layer, the fourth layer comprising a dielectric material. ### Claim 13 (depends on 12) The method according to claim 12, wherein the third layer is a stack of layers, each comprising at least a third Group III-nitride compound. ### Claim 14 (depends on 12) The method according to claim 12, wherein the first Group III-nitride compound is selected from AlN, GaN, InN, AlGaN, AlInN, and GaInN. ### Claim 15 (depends on 12) The method according to claim 12, wherein the first Group III-nitride compound is GaN. ### Claim 16 (depends on 1) A method of manufacturing a tunnel-type field effect transistor comprising: forming a semiconductor structure according to the method of claim 1; and providing, conformally on the elongated structure, a stack of layers, each comprising at least a Group III-nitride compound, wherein a bottom layer of the stack comprises an n-type III-nitride compound and a top layer of the stack comprises a p-type III-nitride compound. ### Claim 17 (depends on 16) The method according to claim 16, further comprising provide a source, a drain, and a gate to the structure. ### Claim 18 (depends on 1) A method of manufacturing a light emitting device comprising: forming a semiconductor structure according to the method of claim 1; and providing, conformally on the elongated structure, a stack of layers, each comprising at least a Group III-nitride compound, wherein a bottom layer of the stack comprises an n-type III-nitride compound and a top layer of the stack comprises a p-type III-nitride compound. ### Claim 19 A semiconductor structure comprising: a monocrystalline substrate having an upper surface covered with a masking layer comprising at least one opening exposing the upper surface; and a first layer, in the opening, comprising a first Group III-nitride compound, wherein the first layer extends further above the opening in the form of a structure, wherein the at least one opening has a top surface defined by three or more straight edges forming a polygon parallel to the upper surface and oriented in such a way with respect to the crystal lattice of the monocrystalline substrate as to permit the epitaxial lateral overgrowth of the first layer in a direction perpendicular to at least one of the edges, and wherein the structure is laterally elongated in the direction perpendicular to said at least one of the edges. ### Claim 20 (depends on 19) A transistor, an LED array, or detector comprising the semiconductor structure according to claim 19.