# US 2019/0172884 A1 · Display device > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2019/0172884 A1 - Document ID: US20190172884A1 - Status: Published application - Kind: A1 - Application number: 16/209,436 - Filed: 2018-12-04 - Published: 2019-06-06 - Earliest claimed: 2017-12-06 - Assignees: LG Display Co., Ltd. - Applicants: LG Display Co., Ltd. - Inventors: JongSik SHIM; SeongHwan HWANG; KilHwan OH - Web page: https://patentgrep.com/patent/US20190172884A1 ## CPC - H10K 59/1213: {the pixel elements being TFTs} - H10D 30/6729: {characterised by the electrodes} - H10D 30/6737: {characterised by the electrode materials} - H10D 30/6743: {Silicon} - H10D 64/62: Electrodes ohmically coupled to a semiconductor - H10D 86/0231: {using masks, e.g. half-tone masks} - H10D 86/441: {Interconnections, e.g. scanning lines} - H10D 86/451: {characterised by the compositions or shapes of the interlayer dielectrics} - H10D 86/481: {integrated with passive devices, e.g. auxiliary capacitors} - H10D 86/60: wherein the TFTs are in active matrices - H10K 59/1216: {the pixel elements being capacitors} - H10K 59/123: Connection of the pixel electrodes to the thin film transistors [TFT] - H10K 59/124: Insulating layers formed between TFT elements and OLED elements - H10K 59/126: Shielding, e.g. light-blocking means over the TFTs - H10K 59/131: Interconnections, e.g. wiring lines or terminals - H10K 59/38: comprising colour filters or colour changing media [CCM] - H10K 59/1201: {Manufacture or treatment} - H10K: ORGANIC ELECTRIC SOLID-STATE DEVICES - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES ## Abstract A display device is disclosed. The display device according to an exemplary embodiment of the present disclosure includes: a substrate including an active area and a non-active area; an active layer, a thin film transistor including a gate electrode, a source electrode, and a drain electrode disposed on the substrate; and an organic light emitting diode including an anode which is electrically connected to the thin film transistor, in which the gate electrode, the source electrode, and the drain electrode are formed of a first conductive layer and a second conductive layer on the first conductive layer and the anode is formed of the same material as the first conductive layer. Therefore, the anode and the first conductive layer of the drain electrode are integrally connected so that a separate contact hole for electrically connecting the anode and the drain electrode is not necessary and the structure may be simplified. ## Claims ### Claim 1 A display device, comprising: a substrate including an active area and a non-active area; a thin film transistor including an active layer, a gate electrode, a source electrode, and a drain electrode disposed on the substrate; and an anode for an organic light emitting diode, the anode being electrically connected to the thin film transistor, wherein the gate electrode, the source electrode, and the drain electrode are formed of a first conductive layer and a second conductive layer on the first conductive layer and the anode is formed of the same material as the first conductive layer. ### Claim 2 (depends on 1) The display device according to claim 1, wherein the anode extends from the first conductive layer of the source electrode or the drain electrode. ### Claim 3 (depends on 1) The display device according to claim 1, wherein the first conductive layer is formed of a transparent conductive material and the second conductive layer is formed of a metallic material. ### Claim 4 (depends on 1) The display device according to claim 1, further comprising: a first planarization layer disposed between the substrate and the anode in an area of the active area excluding an area where the thin film transistor is disposed. ### Claim 5 (depends on 4) The display device according to claim 4, further comprising: a color filter disposed between the substrate and the first planarization layer. ### Claim 6 (depends on 4) The display device according to claim 4, further comprising: a second planarization layer disposed in the non-active area, wherein the first planarization layer and the second planarization layer are spaced apart from each other. ### Claim 7 (depends on 6) The display device according to claim 6, wherein the second planarization layer is an island shape. ### Claim 8 (depends on 1) The display device according to claim 1, further comprising: a data line which is disposed in the active area and disposed between the substrate and the active layer; and a data pad electrode which is disposed in the non-active area and is electrically connected to the data line, wherein the data pad electrode is formed of the same material as the first conductive layer. ### Claim 9 (depends on 8) The display device according to claim 8, further comprising: a light shielding layer which is disposed to overlap the active layer of the thin film transistor and is formed of the same material as the data line. ### Claim 10 (depends on 1) The display device according to claim 1, further comprising: a passivation layer disposed on the thin film transistor, wherein the anode, the gate electrode, the source electrode, and the drain electrode are in contact with a lower surface of the passivation layer. ### Claim 11 (depends on 9) The display device according to claim 9, wherein the light shielding layer is disposed on a same layer as the data line, and overlapped parts between the light shielding layer and the active layer constitute a capacitor. ### Claim 12 (depends on 1) The display device according to claim 1, further comprising: a gate line disposed on the active layer, wherein the gate line is formed of the same material and on the same layer as the gate electrode, the source electrode and the drain electrode. ### Claim 13 (depends on 12) The display device according to claim 12, further comprising: a data line which is disposed in the active area and disposed between the substrate and the active layer; and a power line for supplying a power voltage to the organic light emitting diode, wherein the power line is disposed on the same layer as the data line. ### Claim 14 (depends on 13) The display device according to claim 13, further comprising: a planarization layer which is disposed to overlap only the gate line, the data line, the power line, and the organic light emitting diode, wherein the anode is located on the planarization layer. ### Claim 15 (depends on 14) The display device according to claim 14, further comprising: a color filter disposed between the substrate and the planarization layer. ### Claim 16 (depends on 6) The display device according to claim 6, wherein the second planarization layer is disposed at intersections of wiring lines in the non-active area. ### Claim 17 (depends on 8) The display device according to claim 8, further comprising: a gate line which is perpendicular to the data line and disposed on the active layer; and a gate pad electrode which is disposed in the non-active area and is electrically connected to the gate line, wherein the gate pad electrode is formed of the same material as the first conductive layer. ### Claim 18 (depends on 17) The display device according to claim 17, further comprising: a power line which is disposed in the active area and disposed in parallel with the data line; and a power pad electrode which is disposed in the non-active area and is electrically connected to the power line, wherein the power pad electrode is formed of the same material as the first conductive layer. ### Claim 19 (depends on 4) The display device according to claim 4, further comprising: a first clock line and a second clock line, wherein the first clock line is disposed on a different layer from the second clock line, and a part of the first clock line extends to a gate driver of the display device and intersects a part of the second clock line to transmit a gate shift clock signal to the gate driver. ### Claim 20 (depends on 19) The display device according to claim 19, further comprising a gate insulating layer on the substrate, wherein the gate insulating layer and the first planarization layer are interposed between the intersected parts of the first clock line and the second clock line. ### Claim 21 (depends on 9) The display device according to claim 9, wherein the anode is connected to the light shielding layer.