# US 2019/0172865 A1 · Methods of forming redistribution lines and methods of manufacturing semiconductor devices using the same

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- Number: US 2019/0172865 A1
- Document ID: US20190172865A1
- Status: Published application
- Kind: A1
- Application number: 15/996,480
- Filed: 2018-06-03
- Published: 2019-06-06
- Earliest claimed: 2017-12-06
- Assignees: Samsung Electronics Co., Ltd.
- Applicants: Samsung Electronics Co., Ltd.
- Inventors: YONGHOE CHO; JONGBO SHIM; SEUNGHOON YEON; WON IL LEE
- Web page: https://patentgrep.com/patent/US20190172865A1

## CPC

- H10F 39/811: {Interconnections}
- H10F 39/014: {of CMOS image sensors}
- H10F 39/024: {of coatings or optical elements}
- H10F 39/026: {Wafer-level processing}
- H10F 39/805: {Coatings}
- H10W 20/023: {the interconnections being through-semiconductor vias}
- H10W 20/0245: {comprising use of blind vias during the manufacture}
- H10W 20/0249: {wherein the through-semiconductor via protrudes from backsides of the chips, wafers or substrates during the manufacture}
- H10F 39/182: {Colour image sensors}
- H10F 39/8053: {Colour filters}
- H10F 39/8063: {Microlenses}
- H10F 39/807: {Pixel isolation structures}
- H10W 70/05: of insulating or insulated package substrates, or of interposers, or of redistribution layers (manufacture or treatment of leadframes H10W70/04)
- H10W 70/60: Insulating or insulated package substrates; Interposers; Redistribution layers (leadframes H10W70/40)
- H10W 70/65: Shapes or dispositions of interconnections
- H10W 70/656: Fan-in layouts
- H10W 70/66: Conductive materials thereof
- H10W 70/69: Insulating materials thereof
- H10W 72/01235: {by plating, e.g. electroless plating or electroplating}
- H10W 72/01255: {by using masks}
- H10W 72/01931: {using blanket deposition}
- H10W 72/01951: {Changing the shapes of bond pads}
- H10W 72/242: {relative to the surface, e.g. recessed, protruding}
- H10W 72/244: {relative to underlying supporting features, e.g. bond pads, RDLs or vias}
- H10W 72/252: {comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu}
- H10W 72/29: Bond pads specially adapted therefor
- H10W 72/923: {Bond pads having multiple stacked layers}
- H10W 72/942: {relative to underlying supporting features, e.g. bond pads, RDLs or vias}
- H10W 72/952: {comprising metals or metalloids, e.g. PbSn, Ag or Cu}
- H10W 74/142: {the encapsulations exposing the passive side of the semiconductor body}
- H10W 90/722: {between stacked chips}
- H10F: INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

A method of manufacturing a semiconducor device includes providing a semiconductor substrate having a top surface, on which has been formed a color filter and a micro-lens, and a bottom surface opposite to the top surface, forming a redistribution line on the bottom surface of the semiconductor substrate, and forming on the bottom surface of the semiconductor substrate a passivation layer covering the redistribution line. After the redistribution line and passivation layer are formed, an oxide layer between the redistribution line and the passivation is formed at a temperature that avoids thermal damage to the color filter and the micro-lens.

## Claims

### Claim 1

A method of manufacturing a semiconductor device, the method comprising:
providing a base structure including a semiconductor substrate having a top surface and a bottom surface opposite to the top surface, and a color filter and a micro-lens on the top surface of the semiconductor substrate;
forming a redistribution line on the bottom surface of the semiconductor substrate;
forming a passivation layer covering the redistribution line on the bottom surface of the semiconductor substrate; and
spontaneously forming an oxide layer on the redistribution line and growing the oxide layer between the redistribution line and the passivation layer at a temperature regime specified to avoid thermal damage to the color filter and the micro-lens.

### Claim 2 (depends on 1)

The method of claim 1, wherein the passivation layer is formed of material comprising oxygen, and the oxygen in the passivation layer and a constituent of material of the redistribution line react to form the oxide layer.

### Claim 3 (depends on 1)

The method of claim 1, wherein the growing of the oxide layer automatically occurs during processes carried out subsequent to the forming of the passivation layer such that a thickness of the oxide layer is in a range of from 50 nm to 200 nm at a time at which the manufacturing of the semiconductor device has been completed.

### Claim 4 (depends on 1)

The method of claim 1, wherein the oxide layer automatically is grown automatically to have a thickness of about 100 nm a time at which the manufacturing of the semiconductor device has been completed.

### Claim 5 (depends on 1)

The method of claim 1, wherein the temperature regime has a maximum temperature of 250° C.

### Claim 6 (depends on 1)

The method of claim 1, wherein forming the redistribution line comprises:
forming a mask pattern on the bottom surface of the semiconductor substrate;
sequentially forming a barrier layer and a seed layer on a surface of the semiconductor substrate exposed by the mask pattern; and
forming a metal layer by a plating process using the seed layer.

### Claim 7 (depends on 6)

The method of claim 6, wherein the base structure comprises a through electrode that penetrates the semiconductor substrate and is exposed at the bottom surface of the semiconductor substrate, and
the barrier layer is formed as coupled to the through electrode.

### Claim 8 (depends on 6)

The method of claim 6, wherein the redistribution line has a top surface facing the bottom surface of the semiconductor substrate, a bottom surface facing away from the semiconductor substrate, and a side surface, the side surface connecting the top surface and the bottom surface of the redistribution line to each other,
the barrier layer is formed to cover the top surface of the redistribution line, and
the oxide layer covers the bottom surface and the side surface of the redistribution line.

### Claim 9 (depends on 1)

The method of claim 1, wherein the forming of the passivation layer comprises forming a layer of polybenzoxazole (PBO) on the redistribution line and along the bottom surface of the semiconductor substrate not covered by the redistribution line.

### Claim 10

A method of manufacturing a semiconductor device, the method comprising:
providing a base structure including semiconductor substrate having an active surface and an inactive surface opposite to the active surface, and a color filter and a micro-lens on the active surface;
forming a redistribution metal layer on the inactive surface of the semiconductor substrate;
forming on the inactive surface of the semiconductor substrate an organic insulation layer covering the redistribution metal layer; and
growing a metal oxide layer to a predetermined thickness between the redistribution metal layer and the organic insulation layer,
wherein the metal oxide layer is grown to said predetermined thickness during processing carried out subsequent to the forming of the organic insulation layer within a temperature regime specified to avoid thermal damage to the color filter and the micro-lens.

### Claim 11 (depends on 10)

The method of claim 10, wherein the metal oxide layer is formed by a spontaneous reaction between the redistribution metal layer and the organic insulation layer.

### Claim 12 (depends on 10)

The method of claim 10, wherein temperature regime has a maximum temperature of 250° C.

### Claim 13 (depends on 10)

The method of claim 10, wherein said predetermined thickness is in a range of from 50 nm to 200 nm.

### Claim 14 (depends on 10)

The method of claim 10, wherein the providing of the base structure comprises:
forming a through electrode through the semiconductor substrate; and
thinning the semiconductor substrate to reveal the inactive surface,
wherein the through electrode is exposed at the inactive surface of the semiconductor substrate.

### Claim 15 (depends on 14)

The method of claim 14, wherein the forming of the redistribution metal layer comprises:
forming on the inactive surface of the semiconductor substrate a mask having a groove that exposes the through electrode;
forming on the inactive surface of the semiconductor substrate a barrier layer coupled to the through electrode;
forming a seed layer on the barrier layer; and
performing a plating process using the seed layer to form in the groove a metal layer comprising copper (Cu).

### Claim 16 (depends on 15)

The method of claim 15, wherein the forming of the organic insulation layer comprises:
providing polybenzoxazole (PBO) on the copper (Cu); and
curing the polybenzoxazole (PBO).

### Claim 17 (depends on 10)

The method of claim 10, wherein the providing of the base structure comprises forming a metal line structure on the active surface of the semiconductor substrate, wherein the color filter and the micro-lens are stacked on the metal line structure; and
further comprising forming an outer terminal that extends through the organic insulation layer to the redistribution metal layer.

### Claim 18

A method of forming a redistribution line, the method comprising:
providing a base structure including a semiconductor substrate having an active surface and an inactive surface, and a through electrode that does not reach the inactive surface;
recessing the inactive surface of the semiconductor substrate to expose the through electrode;
subsequently forming the redistribution line on the inactive surface of the semiconductor substrate, the redistribution line electrically connected to the through electrode; and
forming an organic passivation layer covering the redistribution line; and
growing, at a temperature equal to or less than 250° C., a native metal oxide layer between the redistribution line and the organic passivation layer to a thickness in a range of from 50 nm to 200 nm.

### Claim 19 (depends on 18)

The method of claim 18, wherein the redistribution line comprises copper (Cu), and the organic passivation layer comprises polybenzoxazole (PBO).

### Claim 20 (depends on 18)

The method of claim 18, wherein the recessing of the inactive surface of the semiconductor substrate comprises:
adhering a carrier to the active surface of the semiconductor substrate; and
grinding the semiconductor substrate having the carrier adhered thereto.

### Claim 21 (depends on 18)

The method of claim 18, further comprising forming on the inactive surface of the semiconductor substrate, after the inactive surface has been recessed, an insulation layer covering the through electrode, and
planarizing the insulation layer to form a planarized structure in which the through electrode appears at a surface of the insulation layer,
wherein the redistribution line is formed as electrically connected to the through electrode of the planarized structure.

### Claim 22 (depends on 21)

The method of claim 21, wherein the forming of the redistribution line comprises:
forming on the surface of the insulation layer a mask pattern including a groove exposing the through electrode that appears at the surface of the planarized insulation layer,
sequentially forming a barrier layer and a seed layer on a resultant structure including the mask pattern; and
performing a plating process using the seed layer to form in the groove a metal layer comprising copper (Cu).

### Claim 23 (depends on 18)

The method of claim 18, wherein, after the organic passivation layer has been formed formed, the native metal oxide layer is formed over a course of 10 hours to a thickness of 100 nm.

### Claim at position 24

24-29. (canceled)