# US 2019/0172845 A1 · Array Structure, Manufacturing Method Thereof, Array Substrate and Display Device

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- Number: US 2019/0172845 A1
- Document ID: US20190172845A1
- Status: Published application
- Kind: A1
- Application number: 16/256,696
- Filed: 2019-01-24
- Published: 2019-06-06
- Earliest claimed: 2013-11-15
- Assignees: Boe Technology Group Co., Ltd.; Beijing Boe Optoelectronics Technology Co., Ltd.
- Applicants: BOE Technology Group Co., Ltd.; Beijing BOE Optoelectronics Technology Co., Ltd.
- Inventors: Dawei Shi; Xinyou Ji; Fuqiang Li; Jian Guo
- Web page: https://patentgrep.com/patent/US20190172845A1

## CPC

- H10D 86/60: wherein the TFTs are in active matrices
- G02F 1/13458: {Terminal pads}
- G02F 1/136227: {Through-hole connection of the pixel electrode to the active element through an insulation layer}
- G02F 1/1368: in which the switching element is a three-electrode device {(G02F1/136277 takes precedence)}
- H10D 30/6729: {characterised by the electrodes}
- H10D 30/673: {characterised by the shapes, relative sizes or dispositions of the gate electrodes}
- H10D 86/021: {of multiple TFTs}
- H10D 86/441: {Interconnections, e.g. scanning lines}
- H10D 86/451: {characterised by the compositions or shapes of the interlayer dielectrics}
- H10W 72/20: Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- G02F: OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

An array structure and a manufacturing method thereof are disclosed. The method for manufacturing the array structure includes: forming a gate insulating layer on a substrate; and etching the gate insulating layer at a position corresponding to a source/drain signal access terminal to form a through-hole structure provided with an outward-inclined side wall in the gate insulating layer.

## Claims

### Claim 1

A method for manufacturing an array structure, comprising:
forming a gate insulating layer on a substrate; and
etching the gate insulating layer at a position corresponding to a source/drain signal access terminal to form a through-hole structure provided with an outward-inclined side wall in the gate insulating layer.

### Claim 2 (depends on 1)

The method for manufacturing the array structure according to claim 1, further comprising: forming a source/drain layer on the gate insulating layer and at a position corresponding to the through-hole structure of the gate insulating layer, wherein a concavity provided with an outward-inclined side wall is formed in the source/drain layer at the position corresponding to the through-hole structure of the gate insulating layer.

### Claim 3 (depends on 2)

The method for manufacturing the array structure according to claim 2, further comprising:
forming a passivation layer on the source/drain layer and etching the passivation layer; and
forming a conductive film on the passivation layer, wherein
the passivation layer is provided with a through-hole structure which comprises an outward-inclined side wall at the position corresponding to the through-hole structure of the gate insulating layer.

### Claim 4 (depends on 3)

The method for manufacturing the array structure according to claim 3, wherein the conductive film is electrically connected with the source/drain layer at the position corresponding to the through-hole structure of the gate insulating layer.

### Claim 5 (depends on 3)

The method for manufacturing the array structure according to claim 3, further comprising: forming another conductive film at a position corresponding to a gate signal access terminal, wherein
the conductive film and the another conductive film have a same height on the substrate.

### Claim 6

An array structure, comprising:
a substrate; and
a gate insulating layer provided on the substrate and provided with a through-hole structure which comprises an outward-inclined side wall.

### Claim 7 (depends on 6)

The array structure according to claim 6, further comprising a source/drain layer formed on the gate insulating layer and provided with a concavity which comprises an outward-inclined side wall at a position corresponding to the through-hole structure of the gate insulating layer.

### Claim 8 (depends on 7)

The array structure according to claim 7, further comprising:
a passivation layer formed on the source/drain layer and provided with a through-hole structure which comprises an outward-inclined side wall at the position corresponding to the through-hole structure of the gate insulating layer; and
a conductive film formed on the passivation layer.

### Claim 9 (depends on 8)

The array structure according to claim 8, wherein the conductive film is electrically connected with the source/drain layer at the position corresponding to the through-hole structure of the gate insulating layer.

### Claim 10 (depends on 8)

The array structure according to claim 8, further comprising: another conductive film at a position corresponding to a gate signal access terminal, wherein
the conductive film and the another conductive film have a same height on the substrate.

### Claim 11

An array structure, comprising:
a gate insulating layer provided on a substrate; and
a source/drain layer provided on the gate insulating layer and provided with a through-hole structure which comprises an outward-inclined side wall.

### Claim 12 (depends on 11)

The array structure according to claim 11, further comprising:
a passivation layer formed on the source/drain layer and provided with a through-hole structure, which comprises an outward-inclined side wall, at a position corresponding to the through hole of the source/drain layer; and
a conductive film formed on the passivation layer.

### Claim 13 (depends on 12)

The array structure according to claim 12, wherein the conductive film is electrically connected with the source/drain layer at the position corresponding to the through-hole structure of the source/drain layer.

### Claim 14 (depends on 12)

The array structure according to claim 12, further comprising: another conductive film at a position corresponding to a gate signal access terminal, wherein
the conductive film and the another conductive film have a same height on the substrate.
