# US 2019/0171556 A1 · Non-uniform memory access latency adaptations to achieve bandwidth quality of service > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2019/0171556 A1 - Document ID: US20190171556A1 - Status: Published application - Kind: A1 - Application number: 16/204,772 - Filed: 2018-11-29 - Published: 2019-06-06 - Earliest claimed: 2015-12-24 - Assignees: Intel Corporation - Applicants: Intel Corporation - Inventors: Francesc Guim Bernat; Karthik Kumar; Thomas Willhalm; Raj K. Ramanujan; Brian J. Slechta - Web page: https://patentgrep.com/patent/US20190171556A1 ## CPC - G06F 12/02: Addressing or allocation; Relocation (program address sequencing G06F9/00; arrangements for selecting an address in a digital store G11C8/00) - G06F 12/0893: Caches characterised by their organisation or structure - G06F 2212/1024: Latency reduction - G06F 2212/2542: Non-uniform memory access [NUMA] architecture - G06F 2212/603: of operating mode, e.g. cache mode or local memory mode - G06F 2212/6042: Allocation of cache space to multiple users or processors - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) ## Abstract Systems, apparatuses and methods may provide for detecting an issued request in a queue that is shared by a plurality of domains in a memory architecture, wherein the plurality of domains are associated with non-uniform access latencies. Additionally, a destination domain associated with the issued request may be determined. Moreover, a first set of additional requests may be prevented from being issued to the queue if the issued request satisfies an overrepresentation condition with respect to the destination domain and the first set of additional requests are associated with the destination domain. In one example, a second set of additional requests are permitted to be issued to the queue while the first set of additional requests are prevented from being issued to the queue, wherein the second set of additional requests are associated with one or more remaining domains in the plurality of domains. ## Claims ### Claim 1 (canceled) ### Claim 2 A system comprising: a queue that is shared by a plurality of domains of a memory architecture, wherein at least two of the domains comprise different associated memory access latencies; a queue monitor to detect a first issued request in the queue; a system address decoder to determine a first destination domain associated with the first issued request, wherein the first destination domain is one of the plurality of domains; and a request arbitrator to prevent a first set of additional requests from being issued to the queue if the first issued request satisfies an overrepresentation condition with respect to the first destination domain and the first set of additional requests are associated with the first destination domain, wherein the request arbitrator is to assign an allocated number of requests to each domain of the plurality of domains, and identify that the first issued request satisfies the overrepresentation condition in response to a determination that the first issued request has caused a total number of issued requests associated with the first destination domain to reach the allocated number of requests for the first destination domain. ### Claim 3 (depends on 2) The system of claim 2, further comprising a core that is to originate the first issued request and a second issued request that is to include a predicted destination domain, and wherein the system address decoder is to: determine a second destination domain associated with the second issued request, wherein the second destination domain is another of the plurality of domains; and determine whether the predicted destination domain is the same as the second destination domain. ### Claim 4 (depends on 3) The system of claim 3, wherein the system address decoder is to: determine that the predicted destination domain is not the same as the second destination domain; and send a non-acknowledgement to the core, wherein the non-acknowledgement is to include an indication that the second issued request is associated with the second destination domain. ### Claim 5 (depends on 4) The system of claim 4, wherein core is to: receive the non-acknowledgement; update a prediction table based on the non-acknowledgement to reflect the second destination domain; access the updated prediction table to predict destination domains for access requests; and submit a modified second issued request that includes the second destination domain. ### Claim 6 (depends on 3) The system of claim 3, wherein the system address decoder is to: determine that the predicted destination domain is the same as the second destination domain; and send an acknowledgement to the core, wherein the acknowledgement is to include requested data associated with the second issued request, a state message and the second destination domain. ### Claim 7 (depends on 2) The system of claim 2, wherein the queue, the queue monitor, the system address decoder and the request arbitrator are on a same die. ### Claim 8 An apparatus comprising: a queue monitor to detect a first issued request in a queue that is shared by a plurality of domains of a memory architecture, wherein at least two of the domains comprise different associated memory access latencies; a system address decoder to determine a first destination domain associated with the first issued request, wherein the first destination domain is one of the plurality of domains; and a request arbitrator to prevent a first set of additional requests from being issued to the queue if the first issued request satisfies an overrepresentation condition with respect to the first destination domain and the first set of additional requests are associated with the first destination domain, wherein the request arbitrator is to assign an allocated number of requests to each domain of the plurality of domains, and identify that the first issued request satisfies the overrepresentation condition in response to a determination that the first issued request has caused a total number of issued requests associated with the first destination domain to reach the allocated number of requests for the first destination domain. ### Claim 9 (depends on 8) The apparatus of claim 8, further comprising a core that is to originate the first issued request and a second issued request that is to include a predicted destination domain, and wherein the system address decoder is to: determine a second destination domain associated with the second issued request, wherein the second destination domain is another of the plurality of domains; and determine whether the predicted destination domain is the same as the second destination domain. ### Claim 10 (depends on 9) The apparatus of claim 9, wherein the system address decoder is to: determine that the predicted destination domain is not the same as the second destination domain; and send a non-acknowledgement to the core, wherein the non-acknowledgement is to include an indication that the second issued request is associated with the second destination domain. ### Claim 11 (depends on 10) The apparatus of claim 10, wherein core is to: receive the non-acknowledgement; update a prediction table based on the non-acknowledgement to reflect the second destination domain; access the updated prediction table to predict destination domains for access requests; and submit a modified second issued request that includes the second destination domain. ### Claim 12 (depends on 9) The apparatus of claim 9, wherein the system address decoder is to: determine that the predicted destination domain is the same as the second destination domain; and send an acknowledgement to the core, wherein the acknowledgement is to include requested data associated with the second issued request, a state message and the second destination domain. ### Claim 13 (depends on 8) The apparatus of claim 8, wherein the queue monitor, the system address decoder and the request arbitrator are on a same die. ### Claim 14 A method comprising: detecting a first issued request in a queue that is shared by a plurality of domains of a memory architecture, wherein at least two of the domains comprise different associated memory access latencies; determining a first destination domain associated with the first issued request, wherein the first destination domain is one of the plurality of domains; assigning an allocated number of requests to each domain of the plurality of domains; identifying an overrepresentation condition in response to a determination that the first issued request has caused a total number of issued requests associated with the first destination domain to reach the allocated number of requests for the first destination domain; and preventing a first set of additional requests from being issued to the queue when the first issued request satisfies the overrepresentation condition with respect to the first destination domain and the first set of additional requests are associated with the first destination domain. ### Claim 15 (depends on 14) The method of claim 14, further comprising: originating, from a core, the first issued request; originating, from the core, a second issued request that is to include a predicted destination domain; determining a second destination domain associated with the second issued request, wherein the second destination domain is another of the plurality of domains; and determining whether the predicted destination domain is the same as the second destination domain. ### Claim 16 (depends on 15) The method of claim 15, further comprising: determining that the predicted destination domain is not the same as the second destination domain; and sending a non-acknowledgement to the core, wherein the non-acknowledgement is to include an indication that the second issued request is associated with the second destination domain. ### Claim 17 (depends on 16) The method of claim 16, further comprising: receiving, with the core, the non-acknowledgement; updating, with the core, a prediction table based on the non-acknowledgement to reflect the second destination domain; accessing, with the core, the updated prediction table to predict destination domains for access requests; and submitting, with the core, a modified second issued request that includes the second destination domain. ### Claim 18 (depends on 15) The method of claim 15, further comprising: determining that the predicted destination domain is the same as the second destination domain; and sending an acknowledgement to the core, wherein the acknowledgement is to include requested data associated with the second issued request, a state message and the second destination domain. ### Claim 19 At least one non-transitory computer readable storage medium comprising a set of instructions, which when executed by a computing device, cause a computing device to: detect a first issued request in a queue that is shared by a plurality of domains of a memory architecture, wherein at least two of the domains comprise different associated memory access latencies; determine a first destination domain associated with the first issued request, wherein the first destination domain is one of the plurality of domains; assign an allocated number of requests to each domain of the plurality of domains; identify an overrepresentation condition in response to a determination that the first issued request has caused a total number of issued requests associated with the first destination domain to reach the allocated number of requests for the first destination domain; and prevent a first set of additional requests from being issued to the queue when the first issued request satisfies the overrepresentation condition with respect to the first destination domain and the first set of additional requests are associated with the first destination domain. ### Claim 20 (depends on 19) The at least one non-transitory computer readable storage medium of claim 19, wherein the instructions, when executed, cause a computing device to: originate, with a core, the first issued request; originate, with the core, a second issued request that is to include a predicted destination domain; determine a second destination domain associated with the second issued request, wherein the second destination domain is another of the plurality of domains; and determine whether the predicted destination domain is the same as the second destination domain. ### Claim 21 (depends on 20) The at least one non-transitory computer readable storage medium of claim 20, wherein the instructions, when executed, cause a computing device to: determine that the predicted destination domain is not the same as the second destination domain; and send a non-acknowledgement to the core, wherein the non-acknowledgement is to include an indication that the second issued request is associated with the second destination domain. ### Claim 22 (depends on 21) The at least one non-transitory computer readable storage medium of claim 21, wherein the instructions, when executed, cause a computing device to: receive, with the core, the non-acknowledgement; update, with the core, a prediction table based on the non-acknowledgement to reflect the second destination domain; access, with the core, the updated prediction table to predict destination domains for access requests; and submit, with the core, a modified second issued request that includes the second destination domain. ### Claim 23 (depends on 20) The at least one non-transitory computer readable storage medium of claim 20, wherein the instructions, when executed, cause a computing device to: determine that the predicted destination domain is the same as the second destination domain; and send an acknowledgement to the core, wherein the acknowledgement is to include requested data associated with the second issued request, a state message and the second destination domain.