# US 2019/0171198 A1 · Semiconductor manufacturing system > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2019/0171198 A1 - Document ID: US20190171198A1 - Status: Published application - Kind: A1 - Application number: 15/990,708 - Filed: 2018-05-28 - Published: 2019-06-06 - Earliest claimed: 2017-12-06 - Assignees: Foxsemicon Integrated Technology, Inc. - Applicants: Foxsemicon Integrated Technology, Inc. - Inventors: YI-CHUN CHIU; CHUN-KAI HUANG; CHIH-CHENG LU; CHUN-CHUNG CHEN; CHEN-TSU FU; SHENG-FU TSAI - Web page: https://patentgrep.com/patent/US20190171198A1 ## CPC - G05B 23/0275: {Fault isolation and identification, e.g. classify fault; estimate cause or root of failure} - G05B 19/0421: {Multiprocessor system} - H10P 72/34: {the wafers being stored in a carrier, involving loading and unloading} - G05B 2219/45031: Manufacturing semiconductor wafers - G05B: CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS (systems for controlling or regulating non-electric variables G05D; systems for regulating electric or magnetic variables G05F; control devices or systems insofar as characterised by mechanical features only G05G) - H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10 ## Abstract A semiconductor manufacturing system includes an operating terminal, a first controller, and a plurality of second controllers. The operating terminal controls a main controller. Each of the plurality of second controllers is electrically connected to the first controller. In an initial or default state, the operating terminal controls the first controller as a main controller, and when the first controller fails, the operating terminal controls one of the plurality of the second controllers as a main controller, the others of the plurality of second controllers being controlled by the main controller. ## Claims ### Claim 1 A semiconductor manufacturing system, comprising: an operating terminal, wherein the operating terminal controls a main controller; a first controller; and a plurality of second controllers, wherein the plurality of second controllers is electrically connected to the first controller; wherein in an initial state, the operating terminal controls the first controller as a main controller, when the first controller fails, the operating terminal controls one of the plurality of the second controller as a main controller, the others of the plurality of second controllers are controlled from the main controller. ### Claim 2 (depends on 1) The semiconductor manufacturing system of claim 1, wherein the semiconductor manufacturing system further comprises a first wafer box loading unit, the first wafer box loading unit is controlled from the first controller. ### Claim 3 (depends on 1) The semiconductor manufacturing system of claim 1, wherein the semiconductor manufacturing system further comprises a plurality of second wafer box loading units, the plurality of second wafer box loading units is controlled from the second controller. ### Claim 4 (depends on 3) The semiconductor manufacturing system of claim 3, wherein the plurality of second wafer box loading units is corresponding to the plurality of second controllers. ### Claim 5 (depends on 1) The semiconductor manufacturing system of claim 1, wherein the operating terminal comprises an operating interface, a controlling system, and a terminal data port, the operating interface is electrically connected to the controlling system, the controlling system is electrically connected to the terminal data port. ### Claim 6 (depends on 5) The semiconductor manufacturing system of claim 5, wherein in an initial state, the terminal data port is electrically connected to the first controller, when the first controller fails, the terminal data port is electrically connected to one of the plurality of second controllers. ### Claim 7 (depends on 6) The semiconductor manufacturing system of claim 6, wherein the first controller comprises a first data access port, in an initial state, the terminal data port is electrically connected to the first data access port. ### Claim 8 (depends on 7) The semiconductor manufacturing system of claim 7, wherein the first controller further comprises a multi-way data output socket electrically connected to the first data access port, wherein each of the second controllers comprises a second data access port and a third data access port connected to the second data access port, all of the second data access ports are electrically connected to the multi-way data output socket. ### Claim 9 (depends on 8) The semiconductor manufacturing system of claim 8, wherein when the first controller fails, the terminal data port is electrically connected to one of the third data access port. ### Claim 10 (depends on 8) The semiconductor manufacturing system of claim 8, wherein the operating terminal controls the first controller by a first switch, the operating terminal controls the plurality of the second controllers by a plurality of second switch. ### Claim 11 (depends on 10) The semiconductor manufacturing system of claim 10, wherein in an initial state, the first switch is switched on, the plurality of the second switches is switched off; wherein when the first controller fails, the first switch is switched off, one of the plurality of the second switches is switched on and others of the plurality of the second switches are still switched off. ### Claim 12 (depends on 10) The semiconductor manufacturing system of claim 10, wherein the first switch and the plurality of the second switches are manually controlled to switch on or switch off. ### Claim 13 (depends on 10) The semiconductor manufacturing system of claim 10, wherein the first switch and the plurality of the second switches are controlled to switch on or switch off a procedure in the operating terminal. ### Claim 14 (depends on 10) The semiconductor manufacturing system of claim 10, wherein the first switch is connected to the terminal data port and the first data access port. ### Claim 15 (depends on 10) The semiconductor manufacturing system of claim 10, wherein the plurality of the second switches is connected to the terminal data port and the third data access port of one of the second controllers.