# US 2019/0171128 A1 · Light emitting element array, exposing head using the same, and image forming apparatus using the same > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2019/0171128 A1 - Document ID: US20190171128A1 - Status: Published application - Kind: A1 - Application number: 16/197,814 - Filed: 2018-11-21 - Published: 2019-06-06 - Earliest claimed: 2017-12-01 - Assignees: Canon Kabushiki Kaisha - Applicants: Canon Kabushiki Kaisha - Inventors: Koichiro Nakanishi - Web page: https://patentgrep.com/patent/US20190171128A1 ## CPC - G03G 15/04054: {by LED arrays} - H10H 20/813: having a plurality of light-emitting regions, e.g. multi-junction LEDs or light-emitting devices having photoluminescent regions within the bodies - H10H 20/824: comprising only Group III-V materials, e.g. GaP - H10H 29/14: comprising multiple light-emitting semiconductor components - H10H 29/142: {Two-dimensional arrangements, e.g. asymmetric LED layout} - H10D 18/241: {Asymmetrical thyristors} - H10D 64/291: {Gate electrodes for thyristors} - G03G: ELECTROGRAPHY; ELECTROPHOTOGRAPHY; MAGNETOGRAPHY - H10H: INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES ## Abstract In a light emitting element array in which a plurality of components having multiple light emitting thyristors connected to a single shift thyristor are arranged in a plurality of lines, the density of the light emitting thyristor is increased without reduction in the amount of light emission of each of the light emitting thyristors. In the light emitting element array in which multiple light emitting thyristors are formed on a single island structure and the multiple light emitting thyristors are connected to a single shift thyristor, a first element-isolating groove that element-isolates the multiple light emitting thyristors from each other inside the single island structure is formed shallower than a second element-isolating groove that element-isolates the island structure. ## Claims ### Claim 1 A light emitting element array comprising: a substrate; and a plurality of island structures comprising a stacked body of a plurality of semiconductor layers and arranged in lines on the substrate, wherein each of the plurality of island structures has a plurality of light emitting thyristors, wherein, for each of the island structures, a shift thyristor to which the plurality of light emitting thyristors included in each of the island structures are commonly connected is provided, and wherein a bottom surface of a second element-isolating groove that isolates the plurality of island structures from each other is closer to the substrate than a bottom surface of a first element-isolating groove that isolates the plurality of light emitting thyristors from each other inside the island structures. ### Claim 2 (depends on 1) The light emitting element array according to claim 1, wherein the light emitting thyristors have a first semiconductor layer of a first conductivity-type, a second semiconductor layer of a second conductivity-type that is different from the first conductivity-type, a third semiconductor layer of the first conductivity-type, and a fourth semiconductor layer of the second conductivity-type in this order from the substrate side, the first element-isolating groove isolates the fourth semiconductor layer, and the second element-isolating groove isolates the second to fourth semiconductor layers. ### Claim 3 (depends on 2) The light emitting element array according to claim 2, wherein each of the light emitting thyristors has a current concentrating region that is formed at a position separated from the first and second element-isolating grooves. ### Claim 4 (depends on 3) The light emitting element array according to claim 3, wherein each of the light emitting thyristors has a contact layer in contact with the fourth semiconductor layer, and the fourth semiconductor layer has a current concentrating region defined by a region in contact with the contact layer. ### Claim 5 (depends on 4) The light emitting element array according to claim 4, wherein each of the light emitting thyristors has a transparent electrode that covers the contact layer and a periphery of the contact layer, and a drive electrode having an opening above the transparent electrode and in a periphery where the contact layer is not formed, and wherein the contact layer is arranged within the opening when viewed from a stacking direction of the plurality of semiconductor layers. ### Claim 6 (depends on 5) The light emitting element array according to claim 5, wherein when a light emission wavelength of the light emitting thyristors is λ, an optical length of a thickness of the transparent electrode is greater than or equal to 0.9 times and less than or equal to 1.1 times an odd multiple of λ/4. ### Claim 7 (depends on 2) The light emitting element array according to claim 2, wherein a thickness of a stacked body of the first semiconductor layer to the fourth semiconductor layer is 1000 nm to 3000 nm. ### Claim 8 (depends on 1) The light emitting element array according to claim 1, wherein the substrate comprises an n-type semiconductor. ### Claim 9 (depends on 1) The light emitting element array according to claim 1, wherein the light emitting thyristors have a semiconductor layer formed of a GaAs-based material or an AlGaAs-based material. ### Claim 10 (depends on 1) An exposing head comprising: the light emitting element array according to claim 1; and an optic member that collects a light emitted from the light emitting element array. ### Claim 11 (depends on 10) An image forming apparatus comprising: an image bearing member; a charging unit that charges a surface of the image bearing member; an exposing head that exposes the surface of the image bearing member charged by the charging unit and forms an electrostatic latent image on the surface of the image bearing member; a developing unit that develops the electrostatic latent image formed by the exposing head; and a transfer unit that transfers, onto a recording medium, an image developed by the developing unit, wherein the exposing head is prepared according to claim 10.