Device and Method for Supporting Clock Transfer of Multiple Clock Domains

A non-transitory computer readable medium storing a program causing a computer to execute a process comprising:

• receiving N clock signals, wherein at least two clock signals of the N clock signals are different, and wherein the N is an integer greater than or equal to two;
• determining N pieces of phase difference information between the N clock signals and a common reference clock respectively;
• acquiring N pieces of frequency difference information based on the N pieces of phase difference information respectively;
• reconstructing N network timing clocks in the device based on the common reference clock signal and the N pieces of frequency difference information;
• and
• sending the N network timing clocks to N clock domain interfaces respectively, wherein the N network timing clocks are in a one-to-one correspondence with the N clock domain interfaces.

A device, comprising:

• N phase frequency detectors configured to:
• receive N clock signals, wherein at least two clock signals of the N clock signals are different, wherein the N is an integer greater than or equal to two;
• and
• determine N pieces of phase difference information between the N clock signals and a common reference clock respectively;
• N filters configured to acquire N pieces of frequency difference information based on the N pieces of phase difference information respectively;
• and
• N clock reconstructors configured to:
• reconstruct N network timing clocks in the device based on the common reference clock signal and the N pieces of frequency difference information;
• and
• send the N network timing clocks to N clock domain interfaces respectively, wherein the N network timing clocks are in a one-to-one correspondence with the N clock domain interfaces.