# US 2019/0165729 A1 · Transformer feed-back quadrature voltage controlled oscillator for correcting dynamic phase error and communication apparatus using the same

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- Number: US 2019/0165729 A1
- Document ID: US20190165729A1
- Status: Published application
- Kind: A1
- Application number: 15/825,173
- Filed: 2017-11-29
- Published: 2019-05-30
- Earliest claimed: 2017-11-29
- Assignees: National Chung Shan Institute of Science and Technology
- Applicants: National Chung Shan Institute of Science and Technology
- Inventors: HSIAO-CHIN CHEN; YEN-TING CHIANG; CHIEN-TE YU
- Web page: https://patentgrep.com/patent/US20190165729A1

## CPC

- H03B 5/1212: {the amplifier comprising a pair of transistors, wherein an output terminal of each being connected to an input terminal of the other, e.g. a cross coupled pair}
- H03B 5/1218: {the generator being of the balanced type}
- H03B 5/1228: {the amplifier comprising one or more field effect transistors}
- H03B 5/1265: {switched capacitors}
- H03B 5/1296: {the feedback circuit comprising a transformer}
- H03B 27/00: Generation of oscillations providing a plurality of outputs of the same frequency but differing in phase, other than merely two anti-phase outputs
- H03D 7/1425: {with transistors}
- H03L 7/093: using special filtering or amplification characteristics in the loop (H03L7/087 - H03L7/091 take precedence)
- H04L 27/0014: {Carrier regulation (of chaotic carriers H04L27/001; for multicarrier receivers H04L27/2657)}
- H03B 2200/0074: Locking of an oscillator by injecting an input signal directly into the oscillator
- H03B 2200/0078: generating or using signals in quadrature
- H03B 2200/009: Reduction of phase noise
- H04L 2027/0016: {Stabilisation of local oscillators}
- H03B: GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS (generators adapted for electrophonic musical instruments G10H; masers or lasers H01S; generation of oscillations in plasma H05H)
- H03D: DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER (masers, lasers H01S; circuits capable of acting both as modulator and demodulator H03C; details applicable to both modulators and frequency-changers H03C; demodulating pulses H03K9/00; transforming types of pulse modulation H03K11/00; coding, decoding or code conversion, in general H03M; repeater stations H04B7/14; demodulators adapted for AC systems of digital information transmission H04L27/00; synchronous demodulators adapted for colour television H04N9/66)
- H03L: AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES (generation of oscillations H03B)
- H04L: TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION (arrangements common to telegraphic and telephonic communication H04M)

## Abstract

A transformer feed-back quadrature voltage controlled oscillator (QVCO) includes a first VCO; a second VCO; and a dynamic phase error correction circuit, having a plurality of coupling capacitors connected between the first and second VCOs, wherein the capacitances of the coupling capacitors are varied according to a digital control signal to correct a phase error of local oscillating (LO) signals of quadrature phases output by the first and second VCOs.

## Claims

### Claim 1

A transformer feed-back quadrature voltage controlled oscillator (QVCO), comprising:
a first VCO;
a second VCO; and
a dynamic phase error correction circuit, having a plurality of coupling capacitors connected between the first and second VCOs, wherein the capacitances of the coupling capacitors are varied according to a digital control signal to correct a phase error of local oscillating (LO) signals of quadrature phases output by the first and second VCOs.

### Claim 2 (depends on 1)

The transformer feed-back QCVO according to claim 1, wherein the transformer feed-back QCVO is formed by a first half circuit and a second half circuit, wherein each of the first and second half circuit comprises:
a first coupling capacitor;
a second coupling capacitor;
an induction inductor;
a NMOS transistor;
a PMOS transistor; and
a frequency tuning circuit, a first end thereof is connected to a first end of the induction inductor, a drain of the PMOS transistor and a gate of the NMOS transistor, and a second end thereof is connected to a second end of the induction inductor, a drain of the NMOS transistor and a gate of the PMOS transistor;
wherein the induction inductors of the first and second half circuit form a transformer, a body of the PMOS transistor of the first half circuit is connected to a source of the PMOS transistor of the second half circuit through the first coupling capacitor of the first half circuit, a body of the NMOS transistor of the first half circuit is connected to a source of the NMOS transistor of the second half circuit through the second coupling capacitor of the first half circuit, a body of the PMOS transistor of the second half circuit is connected to a source of the NMOS transistor of the first half circuit through the first coupling capacitor of the second half circuit, a body of the NMOS transistor of the second half circuit is connected to a source of the PMOS transistor of the first half circuit through the second coupling capacitor of the second half circuit, the drains of the PMOS transistors and the NMOS transistors are used to output the LO signals of quadrature phases, and a LO frequency is determined by a frequency tuning voltage applied to the frequency tuning circuit based upon a frequency-voltage curve;
wherein the first and second coupling capacitors of the first and second half circuits are the variable coupling capacitors of the dynamic phase error correction circuit, so as to form the dynamic phase error correction circuit, the NMOS transistor, the PMOS transistor and the induction inductor of the first half circuit form the first VCO, and the PMOS transistor and the induction inductor of the second half circuit form the second VCO.

### Claim 3 (depends on 2)

The transformer feed-back QCVO according to claim 2, wherein each of the first half circuit and the second half circuit further comprises:
a switching capacitor device, a first end thereof is connected to the first end of the frequency tuning circuit, and a second end thereof is connected to the second end of the frequency tuning circuit, wherein a code which is given to the switching capacitor is used to shift the frequency-voltage curve.

### Claim 4 (depends on 2)

The transformer feed-back QCVO according to claim 2, wherein each of the first half circuit and the second half circuit further comprises:
a first inductor, wherein the source of the PMOS transistor is connected to a system voltage through the first inductor; and
a second inductor, wherein the source of the NMOS transistor is connected to a ground through the second inductor.

### Claim 5 (depends on 2)

The transformer feed-back QCVO according to claim 2, wherein the frequency tuning comprises:
a first and second variable capacitors;
a first and second resistors; and
a first and second capacitors;
wherein the frequency tuning voltage is applied to first ends of the first and second variable capacitors, a second end of the first variable capacitor is connected to second ends of the first resistor and the first capacitor, a second end of the second variable capacitor is connected to second ends of the second resistor and the second capacitor, a biasing voltage is applied to first ends of the first and second resistors, and first ends of the first and second resistors are respectively connected to the drains of the PMOS and NMOS transistors.

### Claim 6 (depends on 5)

The transformer feed-back QCVO according to claim 5, wherein when the frequency tuning voltage increases, a capacitance of the first variable capacitor increases, and a capacitance of the second variable capacitor decreases.

### Claim 7 (depends on 3)

The transformer feed-back QCVO according to claim 3, wherein the switching capacitor device comprises:
switches and capacitors, wherein each of switches is connected between two capacitors, each set of the switch and the corresponding capacitors is parallelly connected to other one set, and the code is used to turned on or off at least one of the switches.

### Claim 8 (depends on 3)

The transformer feed-back QCVO according to claim 3, wherein a LO frequency is 17.2 GHz through 18.6 GHz.

### Claim 9 (depends on 3)

The transformer feed-back QCVO according to claim 3, wherein the phase noise is about −110 dBc/Hz at a frequency offset being 1 MHz.

### Claim 10

A communication apparatus, comprising:
a transformer feed-back QVCO;
a front-end circuit, connected to the transformer feed-back QVCO;
wherein the transformer feed-back QVCO comprises:
a first VCO;
a second VCO; and
a dynamic phase error correction circuit, having a plurality of coupling capacitors connected between the first and second VCOs, wherein the capacitances of the coupling capacitors are varied according to a digital control signal to correct a phase error of local oscillating (LO) signals of quadrature phases output by the first and second VCOs.

### Claim 11 (depends on 10)

The communication apparatus according to claim 10, wherein the transformer feed-back QCVO is formed by a first half circuit and a second half circuit, wherein each of the first and second half circuit comprises:
a first coupling capacitor;
a second coupling capacitor;
an induction inductor;
a NMOS transistor;
a PMOS transistor; and
a frequency tuning circuit, a first end thereof is connected to a first end of the induction inductor, a drain of the PMOS transistor and a gate of the NMOS transistor, and a second end thereof is connected to a second end of the induction inductor, a drain of the NMOS transistor and a gate of the PMOS transistor;
wherein the induction inductors of the first and second half circuit form a transformer, a body of the PMOS transistor of the first half circuit is connected to a source of the PMOS transistor of the second half circuit through the first coupling capacitor of the first half circuit, a body of the NMOS transistor of the first half circuit is connected to a source of the NMOS transistor of the second half circuit through the second coupling capacitor of the first half circuit, a body of the PMOS transistor of the second half circuit is connected to a source of the NMOS transistor of the first half circuit through the first coupling capacitor of the second half circuit, a body of the NMOS transistor of the second half circuit is connected to a source of the PMOS transistor of the first half circuit through the second coupling capacitor of the second half circuit, the drains of the PMOS transistors and the NMOS transistors are used to output the LO signals of quadrature phases, and a LO frequency is determined by a frequency tuning voltage applied to the frequency tuning circuit based upon a frequency-voltage curve;
wherein the first and second coupling capacitors of the first and second half circuits are the variable coupling capacitors of the dynamic phase error correction circuit, so as to form the dynamic phase error correction circuit, the NMOS transistor, the PMOS transistor and the induction inductor of the first half circuit form the first VCO, and the PMOS transistor and the induction inductor of the second half circuit form the second VCO.

### Claim 12 (depends on 11)

The communication apparatus according to claim 11, wherein each of the first half circuit and the second half circuit further comprises:
a switching capacitor device, a first end thereof is connected to the first end of the frequency tuning circuit, and a second end thereof is connected to the second end of the frequency tuning circuit, wherein a code which is given to the switching capacitor is used to shift the frequency-voltage curve.

### Claim 13 (depends on 11)

The communication apparatus according to claim 11, wherein each of the first half circuit and the second half circuit further comprises:
a first inductor, wherein the source of the PMOS transistor is connected to a system voltage through the first inductor; and
a second inductor, wherein the source of the NMOS transistor is connected to a ground through the second inductor.

### Claim 14 (depends on 11)

The communication apparatus according to claim 11, wherein the frequency tuning comprises:
a first and second variable capacitors;
a first and second resistors; and
a first and second capacitors;
wherein the frequency tuning voltage is applied to first ends of the first and second variable capacitors, a second end of the first variable capacitor is connected to second ends of the first resistor and the first capacitor, a second end of the second variable capacitor is connected to second ends of the second resistor and the second capacitor, a biasing voltage is applied to first ends of the first and second resistors, and first ends of the first and second resistors are respectively connected to the drains of the PMOS and NMOS transistors.

### Claim 15 (depends on 14)

The communication apparatus according to claim 14, wherein when the frequency tuning voltage increases, a capacitance of the first variable capacitor increases, and a capacitance of the second variable capacitor decreases.

### Claim 16 (depends on 12)

The communication apparatus according to claim 12, wherein the switching capacitor device comprises:
switches and capacitors, wherein each of switches is connected between two capacitors, each set of the switch and the corresponding capacitors is parallelly connected to other one set, and the code is used to turned on or off at least one of the switches.

### Claim 17 (depends on 11)

The communication apparatus according to claim 11, further comprising:
an antenna, connected to the front-end circuit, wherein the front-end circuit is a transceiver circuit, a receiver circuit or a transmitter circuit.

### Claim 18 (depends on 12)

The communication apparatus according to claim 12, wherein a LO frequency is 17.2 GHz through 18.6 GHz.

### Claim 19 (depends on 12)

The communication apparatus according to claim 12, wherein the phase noise is about −110 dBc/Hz at a frequency offset being 1 MHz.