Transistor having asymmetric threshold voltage, buck converter and method of forming semiconductor device

A buck converter comprising:

• a first transistor configured to connect to a supply voltage;
• a second transistor connected to a reference voltage, wherein the first transistor is connected to the second transistor, the second transistor has an asymmetric threshold voltage, and the second transistor comprises:
• a gate structure over a substrate, wherein the substrate includes a channel region under the gate structure;
• a first source/drain (S/D) feature in the substrate adjacent a first side of the gate structure;
• a second S/D feature in the substrate adjacent a second side of the gate structure, wherein the second side of the gate structure is opposite the first side of the gate structure;
• a first lightly doped drain (LDD) region adjacent the first S/D feature;
• a second LDD region adjacent the second S/D feature;
• and
• a doping extension region adjacent the first LDD region;
• and
• an inductor connected to the first transistor and to the second transistor.

A method of making a semiconductor device, the method comprising:

• implanting a source feature in a substrate adjacent a first side of a gate structure;
• implanting a drain feature in the substrate adjacent a second side of the gate structure;
• implanting a first lightly doped drain (LDD) region in the substrate adjacent the source feature;
• implanting a second LDD region in the substrate adjacent the drain feature;
• and
• implanting a doping extension region in the substrate adjacent the first LDD region, wherein a maximum depth of the source feature is greater than a maximum depth of the doping extension region.