Thin film transistors with epitaxial source/drain contact regions
AssigneeInternational Business Machines Corporation
InventorsBahman Hekmatshoartabari, Ghavam Shahidi
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Abstract
A method of forming a thin film transistor (TFT) that includes forming a low temperature polysilicon semiconductor layer on a substrate; and implanting first dopant regions on opposing sides of a channel region of the low temperature polysilicon semiconductor layer. The method may further include epitaxially forming second dopant regions on the first dopant regions. The concentration of the conductivity type dopant in the second dopant regions is greater than a concentration of the conductivity type dopant in the first dopant region. The second dopant regions are formed using a low temperature epitaxial deposition process at a temperature less than 350° C.
Claims20
A transistor comprising:
- a first concentration doped source/drain region formed within a crystalline semiconductor region on opposing sides of a channel region within the crystalline semiconductor region;
- and
- a hydrogenated crystalline silicon (c-Si:H) source/drain regions having a second concentration dopant present on the first concentration doped source/drain region, wherein the second concentration dopant of the hydrogenated crystalline silicon (c-Si:H) source/drain regions is greater than a concentration of the first concentration doped source/drain region.
A transistor comprising:
- a crystalline semiconductor region having a thickness of 100 nm or less;
- a first concentration doped source/drain region formed within the semiconductor region;
- hydrogenated crystalline silicon (c-Si:H) source/drain regions having a second concentration dopant present on the first concentration doped source/drain region, wherein the second concentration dopant of the hydrogenated crystalline silicon (c-Si:H) source/drain regions is greater than a concentration of the first concentration doped source/drain region;
- and
- a gate structure present on the crystalline semiconductor region.
A method of forming a transistor comprising:
- forming a crystalline semiconductor layer on a substrate;
- implanting first dopant regions on opposing sides of a channel region of the crystalline semiconductor layer;
- and
- epitaxially forming second dopant regions on the first dopant regions, wherein a concentration of the conductivity type dopant in the second dopant regions is greater than a concentration of the conductivity type dopant in the first dopant regions.
Dependencies are inferred from the claim text.