Method of manufacturing semiconductor device

A method of manufacturing a semiconductor device, the method comprising:

• a first process including forming a first wide bandgap semiconductor layer of a first conductivity type on a front surface of a wide bandgap semiconductor substrate of the first conductivity type containing a semiconductor material having a bandgap that is wider than a bandgap of silicon, an impurity concentration of the first wide bandgap semiconductor layer of the first conductivity type being lower than an impurity concentration of the wide bandgap semiconductor substrate;
• a second process including selectively forming a first semiconductor region of a second conductivity type and a second semiconductor region of the second conductivity type in a surface layer of the first wide bandgap semiconductor layer of the first conductivity type;
• a third process including forming a second wide bandgap semiconductor layer of the first conductivity type in a surface of the first wide bandgap semiconductor layer of the first conductivity type, the second wide bandgap semiconductor layer of the first conductivity type containing a semiconductor material having a bandgap that is wider than the bandgap of silicon, an impurity concentration of the second wide bandgap semiconductor layer of the first conductivity type being lower than the impurity concentration of the wide bandgap semiconductor substrate;
• a fourth process including selectively forming a third semiconductor region of the second conductivity type in a surface of the second wide bandgap semiconductor layer of the first conductivity type, the third semiconductor region of the second conductivity type in contact with the first semiconductor region;
• a fifth process including forming a wide bandgap semiconductor layer of the second conductivity type on the surface of the second wide bandgap semiconductor layer of the first conductivity type, the wide bandgap semiconductor layer of the second conductivity type containing a semiconductor material having a bandgap wider than the bandgap of silicon;
• a sixth process including selectively forming a source region of the first conductivity type in the wide bandgap semiconductor layer of the second conductivity type;
• a seventh process including forming a trench that penetrates the source region and the wide bandgap semiconductor layer of the second conductivity type and reaches the second wide bandgap semiconductor layer of the first conductivity type to entirely face the second semiconductor region in a depth direction;
• an eighth process including forming a gate electrode in the trench via a gate insulating film;
• a ninth process including forming a source electrode to be in contact with the wide bandgap semiconductor layer of the second conductivity type and the source region;
• and
• a tenth process including forming a drain electrode on a rear surface of the wide bandgap semiconductor substrate, wherein
• in selectively forming the first semiconductor region of the second conductivity type and the second semiconductor region of the second conductivity type, a part of the first semiconductor region and the second semiconductor region are connected so that the first wide bandgap semiconductor layer of the first conductivity type between the first semiconductor region and the second semiconductor region remains.