Display panel and method for manufacturing the same

A method for manufacturing a display panel, comprising:

• forming, on a base layer comprising a first area and a second area extending from the first area, at least one inorganic layer overlapping the first area and the second area along a direction orthogonal to an upper surface of the base layer;
• forming a silicon semiconductor pattern on the at least one inorganic layer to overlap the first area along the direction orthogonal to the upper surface of the base layer;
• forming a first control electrode on a first insulation layer to overlap the silicon semiconductor pattern along the direction orthogonal to the upper surface of the base layer, wherein the first insulation layer overlaps the first area and the second area along the direction orthogonal to the upper surface of the base layer;
• forming a second control electrode spaced apart from the first control electrode on a second insulation layer overlapping the first area and the second area along the direction orthogonal to the upper surface of the base layer, wherein the second insulation layer substantially covers upper and side surfaces of the first control electrode;
• forming a third insulation layer overlapping the first area and the second area along the direction orthogonal to the upper surface of the base layer, wherein the third insulation layer substantially covers upper and side surfaces of the second control electrode;
• performing a first etching partially removing the first, second and third insulation layers to form a first contact hole and a second contact hole exposing a first portion and a second portion of the silicon semiconductor pattern, respectively, and to form a first upper groove exposing the at least one inorganic layer in the second area;
• forming an oxide semiconductor pattern overlapping the second control electrode on the third insulation layer along the direction orthogonal to the upper surface of the base layer;
• forming a first input electrode and a first output electrode, which are connected to the silicon semiconductor pattern through the first contact hole and the second contact hole, respectively, on the third insulation layer and forming a second input electrode and a second output electrode, which are connected to the oxide semiconductor pattern, on the third insulation layer;
• forming a fourth insulation layer on the third insulation layer, wherein the fourth insulation layer overlaps the first area and the second area along the direction orthogonal to the upper surface of the base layer;
• performing a second etching partially removing the fourth insulation layer to form a third contact hole exposing the first output electrode in the fourth insulation layer, and to form a second upper groove exposing the at least one inorganic layer in the second area;
• performing a third etching removing a portion of the at least one inorganic layer, which overlaps the second area, to form a lower groove aligned with the first upper groove along the direction orthogonal to the upper surface of the base layer in the at least one inorganic layer;
• forming an organic layer disposed on the fourth insulation layer within the first area and disposed in the first upper groove, the second upper groove, and the lower groove within the second area;
• performing a fourth etching partially removing the organic layer to form a fourth contact hole connected to the third contact hole in the organic layer;
• and
• forming a light emitting element electrically connected to the first output electrode on the organic layer.

A method for manufacturing a display panel, comprising:

• forming, on a base layer comprising a first area and a second area extending from the first area, at least one inorganic layer overlapping the first area and the second area along a direction orthogonal to an upper surface of the base layer;
• forming first to third insulation layers overlapping the first area and the second area on the at least one inorganic layer along the direction orthogonal to the upper surface of the base layer and a silicon semiconductor pattern overlapping the first area on the at least one inorganic layer along the direction orthogonal to the upper surface of the base layer;
• performing a first etching partially removing the first to third insulation layers to expose a portion of the silicon semiconductor pattern and a portion, which overlaps the second area along the direction orthogonal to the upper surface of the base layer, of the at least one inorganic layer;
• forming an oxide semiconductor pattern above the first to third insulation layers and a plurality of electrodes connected to the oxide semiconductor pattern and the silicon semiconductor pattern;
• forming a fourth insulation layer substantially covering an upper surface of the oxide semiconductor pattern and upper and side surfaces of the plurality of electrodes on the first to third insulation layers;
• performing a second etching partially removing the fourth insulation layer so that at least one electrode of the plurality of electrodes and the portion of the at least one inorganic layer, which overlaps the second area along the direction orthogonal to the upper surface of the base layer, are exposed;
• performing a third etching partially removing the portion of the at least one inorganic layer, which overlaps the second area along the direction orthogonal to the upper surface of the base layer;
• forming an organic layer on the fourth insulation layer within the first area and disposed in an area in which the at least one inorganic layer is removed and an area in which the first to fourth insulation layers are removed within the second area;
• performing a fourth etching partially removing the organic layer so that the at least one electrode of the plurality of electrodes is exposed to the organic layer;
• forming a light emitting element electrically connected to the at least one electrode of the plurality of electrodes and a signal line on the organic layer;
• and
• bending the second area.