Semiconductor chip and semiconductor package having the same
AssigneeSamsung Electronics Co., Ltd.
InventorJung-Hyun Roh
Life of this patent
Estimating the term…
Abstract
A semiconductor chip including a substrate including a plurality of chip areas and a line-shaped scribe area defining the chip areas, an integrated circuit (IC) structure on the chip area, the IC structure including a plurality of transistors and a plurality of stacked wiring structures connected to the transistors, and a warpage protector in the line-shaped scribe area and corresponding to the stacked wiring structures, the warpage protector supporting at least one side of the IC structure may be provided.
Claims20
A semiconductor chip comprising:
- a substrate including a plurality of chip areas and a line-shaped scribe area defining the chip areas;
- an integrated circuit (IC) structure on the chip area, the IC structure including a plurality of transistors and a plurality of stacked wiring structures connected to the transistors;
- and
- a warpage protector in the line-shaped scribe area and corresponding to the stacked wiring structures, the warpage protector supporting at least one side of the IC structure.
A semiconductor package comprising:
- a circuit board including an electric circuit pattern;
- a first semiconductor chip on the circuit board and electrically connected to the circuit board;
- and
- a second semiconductor chip on the first semiconductor chip and electrically connected to the first semiconductor chip, each of first and the second semiconductor chips including,
- a substrate including a plurality of chip areas and a line-shaped scribe area defining the chip areas,
- an integrated circuit (IC) structure on the chip area, the IC structure including a plurality of transistors and a plurality of stacked wiring structures connected to the transistors, and
- a warpage protector in the line-shaped scribe area and corresponding to the stacked wiring structures, the warpage protector supporting at least a side of the IC structure.
A semiconductor package comprising:
- a mother board including an electronic circuit pattern;
- a system on chip (SoC) package on the mother board, the SOC package including an operational chip, the operational chip including one or more microprocessors;
- and
- a multichip package on the SoC package, the multichip package including a controller and at least one memory chip, each of the operational chip and the memory chip including,
- a substrate including a plurality of chip areas and a line-shaped scribe area defining the chip areas,
- an integrated circuit (IC) structure on the chip area, the IC structure including a plurality of transistors and a plurality of stacked wiring structures connected to the transistors, and
- a warpage protector in the line-shaped scribe area and corresponding to the stacked wiring structures, the warpage protector supporting at least one side of the IC structure.
Dependencies are inferred from the claim text.