Fan-out semiconductor package

A fan-out semiconductor package comprising:

• a frame including a plurality of insulating layers, a plurality of wiring layers disposed on the plurality of insulating layers, and a plurality of connection via layers penetrating through the plurality of insulating layers and electrically connecting the plurality of wiring layers to each other, and having a recess portion and a stopper layer disposed on a bottom surface of the recess portion;
• a semiconductor chip disposed in the recess portion and having connection pads, an active surface on which the connection pads are disposed, and an inactive surface opposing the active surface and so that disposed on the stopper layer;
• an encapsulant covering at least portions of the semiconductor chip and filling at least portions of the recess portion;
• a connection member disposed on the frame and the active surface of the semiconductor chip and including a redistribution layer electrically connecting the plurality of wiring layers of the frame and the connection pads of the semiconductor chip to each other;
• and
• a guide pattern disposed adjacent to a wall of the recess portion and disposed in the frame,
• wherein an edge of the bottom surface of the recess portion has a groove portion.