Pitch-divided interconnects for advanced integrated circuit structure fabrication

An integrated circuit structure, comprising:

• an inter-layer dielectric (ILD) layer above a substrate;
• and
• a plurality of conductive interconnect lines in and spaced apart by the ILD layer, the plurality of conductive interconnect lines comprising:
• a first interconnect line having a width;
• a second interconnect line immediately adjacent the first interconnect line, the second interconnect line having a width;
• a third interconnect line immediately adjacent the second interconnect line, the third interconnect line having a width different than the width of the first interconnect line, wherein the width of the third interconnect line is different than the width of the second interconnect line;
• a fourth interconnect line immediately adjacent the third interconnect line, the fourth interconnect line having a width the same as the width of the second interconnect line;
• and
• a fifth interconnect line immediately adjacent the fourth interconnect line, the fifth interconnect line having a width the same as the width of the first interconnect line.

An integrated circuit structure, comprising:

• an inter-layer dielectric (ILD) layer above a substrate;
• a plurality of conductive interconnect lines in and spaced apart by the ILD layer, the plurality of conductive interconnect lines comprising:
• a first interconnect line having a width;
• a second interconnect line immediately adjacent the first interconnect line, the second interconnect line having a width different than the width of the first interconnect line;
• a third interconnect line immediately adjacent the second interconnect line, the third interconnect line having a width, wherein the width of the third interconnect line is the same as the width of the first interconnect line;
• a fourth interconnect line immediately adjacent the third interconnect line, the fourth interconnect line having a width the same as the width of the second interconnect line;
• and
• a fifth interconnect line immediately adjacent the fourth interconnect line, the fifth interconnect line having a width the same as the width of the first interconnect line.

An integrated circuit structure, comprising:

• an inter-layer dielectric (ILD) layer above a substrate;
• a plurality of conductive interconnect lines in and spaced apart by the ILD layer, the plurality of conductive interconnect lines comprising:
• a first interconnect line having a width;
• a second interconnect line immediately adjacent the first interconnect line, the second interconnect line having a width different than the width of the first interconnect line;
• a third interconnect line immediately adjacent the second interconnect line, the third interconnect line having a width;
• a fourth interconnect line immediately adjacent the third interconnect line, the fourth interconnect line having a width the same as the width of the second interconnect line, wherein a pitch between the first interconnect line and the third interconnect line is different than a pitch between the second interconnect line and the fourth interconnect line;
• and
• a fifth interconnect line immediately adjacent the fourth interconnect line, the fifth interconnect line having a width the same as the width of the first interconnect line.

An integrated circuit structure, comprising:

• an inter-layer dielectric (ILD) layer above a substrate;
• and
• a plurality of conductive interconnect lines in and spaced apart by the ILD layer, the plurality of conductive interconnect lines comprising:
• a first interconnect line having a width;
• a second interconnect line immediately adjacent the first interconnect line, the second interconnect line having a width, wherein the width of the second interconnect line is the same as the width of the first interconnect line;
• a third interconnect line immediately adjacent the second interconnect line, the third interconnect line having a width different than the width of the first interconnect line;
• a fourth interconnect line immediately adjacent the third interconnect line, the fourth interconnect line having a width the same as the width of the second interconnect line;
• and
• a fifth interconnect line immediately adjacent the fourth interconnect line, the fifth interconnect line having a width the same as the width of the first interconnect line.

An integrated circuit structure, comprising:

• an inter-layer dielectric (ILD) layer above a substrate;
• and
• a plurality of conductive interconnect lines in and spaced apart by the ILD layer, the plurality of conductive interconnect lines comprising:
• a first interconnect line having a width;
• a second interconnect line immediately adjacent the first interconnect line, the second interconnect line having a width;
• a third interconnect line immediately adjacent the second interconnect line, the third interconnect line having a width different than the width of the first interconnect line;
• a fourth interconnect line immediately adjacent the third interconnect line, the fourth interconnect line having a width the same as the width of the second interconnect line, wherein a pitch between the first interconnect line and the third interconnect line is different than a pitch between the second interconnect line and the fourth interconnect line;
• and
• a fifth interconnect line immediately adjacent the fourth interconnect line, the fifth interconnect line having a width the same as the width of the first interconnect line.