Via sizing for ir drop reduction
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsHiranmay Biswas, Chin-Shen Lin, Kuo-Nan Yang, Chung-Hsing Wang
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AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsHiranmay Biswas, Chin-Shen Lin, Kuo-Nan Yang, Chung-Hsing Wang
Estimating the term…
A method of designing an integrated circuit device includes receiving an initial design of an integrated circuit, including a selection and location of a functional group of integrated circuit components, a power grid with multiple layers of conductive lines for supplying power to the components, and vias of one or more initial sizes interconnecting the conductive lines of different layers. The method further includes determining, based on a predetermined criterion such as the existence of unoccupied space for a functional unit, that a via modification can be made. The method further includes substituting the one or more of the via with a modified via of a larger cross-sectional area or a plurality of vias having a larger total cross-sectional area than the initial via. The method further includes confirming that the modified design complies with a predetermined set of design rules.
A method of making an integrated circuit device, the method comprising:
A computer-readable medium storing instructions that, when executed by a computer, cause the computer to perform a method comprising:
An integrated circuit device, comprising:
Dependencies are inferred from the claim text.