Multi-Phase Half Bridge Driver Package and Methods of Manufacture

A semiconductor package, comprising:

• a plurality of half bridge assemblies each comprising a metal lead, a first power transistor die attached to a first side of the metal lead, and a second power transistor die disposed under the first power transistor die and attached to a second side of the metal lead opposite the first side, each metal lead having a notch which exposes one or more bond pads at a side of the second power transistor die attached to the metal lead;
• a controller die configured to control the first power transistor dies and the second power transistor dies;
• a mold compound in which each power transistor die, each metal lead and the controller die are embedded;
• and
• bond wire connections between the controller die and the one or more bond pads at the side of each second power transistor die exposed by the notch in the corresponding metal lead.

A semiconductor package, comprising:

• a plurality of half bridges each comprising a first power transistor die disposed over a second power transistor die;
• a separate first metal lead attached to a bottom side of the first power transistor die and to a top side of the second power transistor die of each half bridge;
• a separate or single second metal lead attached to a top side of the first power transistor die of each half bridge;
• and
• a mold compound in which each half bridge and each metal lead are embedded,
• wherein each first metal lead protrudes from a side face of the mold compound to form a half bridge output terminal,
• wherein each second metal lead protrudes from a side face of the mold compound to form a first half bridge power terminal,
• wherein at least part of a bottom side of the second power transistor die of each half bridge is not covered by the mold compound at a first main face of the mold compound to form a second half bridge power terminal,
• wherein at least part of each second metal lead is not covered by the mold compound at a second main face of the mold compound opposite the first main face,
• wherein the part of the bottom side of each second power transistor die not covered by the mold compound has bare semiconductor material exposed at the first main face of the mold compound.