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US 2019/0164866 A1Published application
Semiconductor device and method for manufacturing the same
AssigneesTaiwan Semiconductor Manufacturing Company, Ltd., National Taiwan University
InventorsJhih-Yang YAN, Fang-Liang LU, Chee-Wee LIU
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Abstract
A device includes a non-insulator structure, a first ILD layer, a first thermal via, and a first electrical via. The first ILD is over the non-insulator structure. The first thermal via is through the first ILD layer and in contact with the non-insulator structure. The first electrical via is through the first ILD layer and in contact with the non-insulator structure. The first thermal via and the first electrical via have different materials and the same height.
Claims20
A device, comprising:
- a non-insulator structure;
- a first interlayer dielectric (ILD) layer over the non-insulator structure;
- a first thermal via through the first ILD layer and in contact with the non-insulator structure;
- and
- a first electrical via through the first ILD layer and in contact with the non-insulator structure, wherein the first thermal via and the first electrical via have different materials and the same height.
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A device, comprising:
- a plurality of semiconductor fins;
- a gate structure across the semiconductor fins;
- an interlayer dielectric (ILD) layer surrounding the gate structure;
- and
- a first isolation dielectric between the semiconductor fins and having a thermal conductivity greater than a thermal conductivity of the ILD layer.
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A method, comprising:
- forming a first hole in a first interlayer dielectric (ILD) layer to expose a non-insulator structure under the first ILD layer;
- forming a thermal via in the first hole;
- forming a second hole in the first ILD layer to expose the non-insulator structure;
- and
- forming an electrical via in the second hole using a different material than the thermal via.
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Dependencies are inferred from the claim text.