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US 2019/0164847 A1Published application
Method of manufacturing semiconductor device
AssigneeRenesas Electronics Corporation
InventorKeiichi MAEKAWA
Life of this patent
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Abstract
To improve reliability of a semiconductor device, in a method of manufacturing the semiconductor device, a ground plane region of an n-type MISFET is formed by ion-implanting a p-type impurity and nitrogen (N) and a ground plane region of a p-type MISFET is formed by ion-implanting an n-type impurity and one of carbon (C) and fluorine (F).
Claims13
A method of manufacturing a semiconductor device, comprising the steps of:
- (a) providing an SOI substrate having:
- a semiconductor substrate that includes a first region in which an n-type first MISFET is to be formed and a second region in which a p-type second MISFET is to be formed,
- an insulating layer formed on the semiconductor substrate, and
- a semiconductor layer formed on the insulating layer;
- (b) forming a first semiconductor region by ion-implanting a p-type impurity and nitrogen into the semiconductor substrate in the first region;
- (c) forming a second semiconductor region by ion-implanting an n-type impurity and one of carbon and fluorine into the semiconductor substrate in the second region;
- (d) forming the first MISFET in the first region, and
- (e) forming the second MISFET in the second region.
5 more elements
A method of manufacturing a semiconductor device, comprising the steps of:
- (a) providing an SOI substrate having:
- a semiconductor substrate that includes a first region in which an n-type first MISFET is to be formed and a second region in which a p-type second MISFET is to be formed,
- an insulating layer formed on the semiconductor substrate, and
- a semiconductor layer formed on the insulating layer;
- (b) forming a first gate electrode on the semiconductor layer via a first gate insulating film in the first region;
- (c) forming a second gate electrode on the semiconductor layer via a second gate insulating film in the second region;
- (d) after the step (b), forming a first semiconductor region by ion-implanting a p-type impurity and nitrogen into the semiconductor substrate in the first region;
- (e) after the step (c), forming a second semiconductor region by ion-implanting an n-type impurity and one of carbon and fluorine into the semiconductor substrate in the second region;
- (f) after the step (d), forming an n-type third semiconductor region in the semiconductor layer at both ends of the first gate electrode, and
- (g) after the step (e), forming a p-type fourth semiconductor region in the semiconductor layer at both ends of the second gate electrode.
7 more elements
Dependencies are inferred from the claim text.