Methods to produce a 3d semiconductor memory device and system

A method for producing a 3D memory device, the method comprising:

• providing a first level comprising a single crystal layer;
• forming at least one second level above said first level;
• performing a first etch step comprising etching holes within said second level;
• forming at least one third level above said at least one second level;
• performing a second etch step comprising etching holes within said third level;
• and
• performing additional processing steps to form a plurality of first memory cells within said second level and a plurality of second memory cells within said third level,
• wherein each of said first memory cells comprises one first transistor,
• wherein each of said second memory cells comprises one second transistor,
• wherein at least one of said first or second transistors has a channel, a source and a drain having the same doping type,
• wherein said forming at least one third level comprises forming a window within said third level so to allow a lithography alignment through said third level to an alignment mark disposed underneath said third level, and
• wherein said memory is a NAND nonvolatile type memory.

A method for producing a 3D memory device, the method comprising:

• providing a first level comprising a single crystal layer;
• forming at least one second level above said first level;
• performing a first etch step comprising etching holes within said second level;
• forming at least one third level above said at least one second level;
• performing a second etch step comprising etching holes within said third level;
• and
• performing additional processing steps to form a plurality of first memory cells within said second level and a plurality of second memory cells within said third level,
• wherein each of said first memory cells comprises one first transistor,
• wherein each of said second memory cells comprises one second transistor,
• wherein at least one of said first or second transistors has a channel, a source and a drain having the same doping type, and
• wherein said forming at least one third level comprises forming a window within said third level so to allow a lithography alignment through said third level to an alignment mark disposed underneath said third level.