Plugs for interconnect lines for advanced integrated circuit structure fabrication

A method of fabricating integrated circuit structure, the method comprising:

• forming a line trench in an upper portion of an interlayer dielectric (ILD) material layer formed above an underlying metallization layer;
• forming a via trench in a lower portion of the ILD material layer, the via trench exposing a metal line of the underlying metallization layer;
• forming a sacrificial material above the ILD material layer and in the line trench and the via trench;
• patterning the sacrificial material to form an opening to break a continuity of the sacrificial material in the line trench;
• filling the opening in the sacrificial material with a dielectric material to form a dielectric plug having an upper surface above an upper surface of the ILD material;
• removing the sacrificial material and leaving the dielectric plug to remain;
• filling the line trench and the via trench with a conductive material;
• and
• planarizing the dielectric plug and the conductive material to provide a planarized dielectric plug breaking a continuity of the conductive material in the line trench.