Varying Temperature Anneal for Film and Structures Formed Thereby
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsShu Ling Liao, Chung-Chi Ko, Wan-Yi Kao
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Abstract
Semiconductor device structures having dielectric features and methods of forming dielectric features are described herein. In some examples, the dielectric features are formed by an ALD process followed by a varying temperature anneal process. The dielectric features can have high density, low carbon concentration, and lower k-value. The dielectric features formed according to the present disclosure has improved resistance against etching chemistry, plasma damage, and physical bombardment in subsequent processes while maintaining a lower k-value for target capacitance efficiency.
Claims20
A method comprising:
- forming a layer using an Atomic Layer Deposition (ALD) process;
- and
- annealing the layer in a nitrogen environment, comprising:
- annealing the layer for a first period of time while increasing an annealing temperature from a first temperature to a second temperature;
- annealing the layer at the second temperature for a second period of time;
- and
- annealing the layer at a third period of time while decreasing annealing temperature from the second temperature.
A method comprising:
- forming a layer using an Atomic Layer Deposition (ALD) process, the ALD process comprising:
- for a cycle of the ALD:
- flowing a silicon source precursor;
- flowing a carbon and nitride source precursor;
- and
- flowing an oxygen source precursor;
- and
- annealing the layer to reduce an amount of carbon and an amount of nitrogen in the layer.
A structure comprising:
- an active area on a substrate, the active area comprising a source/drain region;
- a gate structure over the active area;
- and
- a gate spacer along a sidewall of the gate structure, the gate spacer being disposed laterally between the gate structure and the source/drain region, the gate spacer comprising:
- a first spacer layer;
- and
- a second spacer layer formed over the first spacer layer, wherein the second spacer layer has a carbon concentration in a range from 0 atomic percent (at. %) to 5 at. %, and the second spacer layer has a lower k-value than the first spacer layer.
Dependencies are inferred from the claim text.