High Precision And Highly Efficient Tuning Mechanisms And Algorithms For Analog Neuromorphic Memory In Artificial Neural Networks
AssigneeSilicon Storage Technology, Inc.
InventorsHieu Van Tran, Vipin Tiwari, Nhan Do, Steven Lemke, Santosh Hariharan, Stanley Hong
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Abstract
An artificial neural network device that utilizes analog neuromorphic memory that comprises one or more non-volatile memory arrays. The embodiments comprise improved mechanisms and algorithms for tuning the non-volatile memory arrays such that the floating gates of the memory cells can be quickly and accurately injected with the desired amount of charge to signify an analog value utilized as a weight by the artificial neural network.
Claims58
A method for identifying within an array of non-volatile memory cells the non-volatile memory cells that can be programmed quickly, comprising:
- erasing a non-volatile memory cell;
- programming the non-volatile memory cell at a first voltage;
- measuring a first current through the non-volatile memory cell during a read operation;
- programming the non-volatile memory cell at a second voltage;
- measuring a second current through the non-volatile memory cell during a read operation;
- and
- if the difference between the second current and the first current exceeds a threshold value, storing data that indicates the non-volatile memory cell can be programmed quickly.
A method for identifying within an array of non-volatile memory cells the non-volatile memory cells that can be programmed quickly, comprising:
- programming a non-volatile memory cell;
- erasing the non-volatile memory cell at a first voltage;
- measuring a first current through the non-volatile memory cell during a read operation;
- erasing the non-volatile memory cell at a second voltage;
- measuring a second current through the non-volatile memory cell during a read operation;
- and
- if the difference between the second current and the first current exceeds a threshold value, storing data that indicates the non-volatile memory cell can be programmed quickly.
A method for programming a plurality of non-volatile analog neuromorphic memory cells based on a programming speed characteristic of the cell, comprising:
- determining the programming speed characteristic of a cell;
- if the programming speed characteristic has a first value, performing a first tuning algorithm on the cell to achieve a desired charge level on a floating gate of the cell;
- and
- if the programming speed characteristic has a second value, performing a second tuning algorithm on the cell to achieve the desired charge level on the floating gate of the cell.
A method for programming a non-volatile analog neuromorphic memory cell, comprising:
- erasing the cell;
- performing a coarse programming sequence on the cell, comprising:
- performing a first programming operation on the cell with a first voltage increment;
- and
- repeating the first programming operation until the current through the cell during a read operation exceeds a first current threshold;
- and
- performing a fine programming sequence on the cell, comprising;
- performing a second programming operation on the cell with a second voltage increment, wherein the second voltage increment is smaller than the first voltage increment;
- and
- repeating the second programming operation until the current through the cell during a read operation exceeds a second current threshold.
A method for programming a non-volatile memory cell, comprising:
- erasing the cell;
- performing a coarse programming sequence on the cell, comprising:
- programming a cell with an initial voltage;
- and
- programming the cell with a new voltage increment equal to a portion of the value of the previous voltage increment until current through the cell during a read operation exceeds a threshold;
- and
- performing a fine programming sequence on the cell, comprising;
- removing a portion of the charge on the floating gate of the cell;
- programming the cell with a fine voltage increment until the current through the cell during a read operation exceeds the threshold, wherein the fine voltage increment is smaller than each voltage increment applied during the coarse programming sequence.
A method for programming a non-volatile analog neuromorphic memory cell, comprising:
- erasing the cell;
- performing a coarse programming sequence on the cell, comprising:
- performing a first programming operation on the cell with a first voltage increment;
- and
- repeating the first programming operation until the current through the cell during a read operation exceeds a first current threshold;
- and
- performing a fine programming sequence on the cell, comprising;
- removing a portion of the charge on the floating gate of the cell;
- programming the cell with a second voltage increment until the current through the cell during a read operation exceeds the threshold, wherein the second voltage increment is smaller than the first voltage increment.
Dependencies are inferred from the claim text.