Memory system having resistive memory device and operating method thereof
AssigneeSK hynix Inc.
InventorsSeung-Gyu JEONG, Jung-Hyun KWON, Do-Sun HONG, Won-Gyu SHIN
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Abstract
A memory system includes a memory cell array including a plurality of resistive memory cells; a peripheral circuit suitable for providing a set pulse or a reset pulse with write data into a selected memory cell among the resistive memory cells, based on a write command; and a memory controller suitable for providing the write command with the write data to the peripheral circuit and scheduling the write command based on an amount of power consumption calculated depending on the number of either low bits or high bits in the write data.
Claims24
A memory system comprising:
- a memory cell array including a plurality of resistive memory cells;
- a peripheral circuit suitable for providing a set pulse or a reset pulse which corresponds to write data into a selected memory cell among the resistive memory cells, based on a write command;
- and
- a memory controller suitable for providing the write command with the write data to the peripheral circuit and scheduling the write command based on an amount of power consumption calculated depending on the number of either low bits or high bits in the write data.
An operating method of a memory system, comprising:
- generating a write command and a write data;
- calculating an amount of power consumption depending on the number of low bits or high bits in the write data and issuing the write command with the write data to a memory device based on a value obtained by cumulatively adding up the calculated amount of power consumption;
- and
- providing, by the memory device, a set pulse or a reset pulse corresponding to the write data to a selected memory cell among resistive memory cells based on the write command.
An operating method of a memory system, comprising:
- generating a write command and write data;
- calculating an amount of power consumption depending on a number of low bits or high bits in the write data;
- storing the calculated amount of power consumption in a power data table based on an address when the write command commands a first write operation;
- cumulatively adding up the amount of power consumption stored in the power data table based on the address when the write command commands a second write operation;
- issuing the write command and the write data to a memory device based on a value obtained by cumulatively adding up the amount of power consumption;
- and
- providing, by the memory device, a set pulse or a reset pulse corresponding to the write data to a selected memory cell among resistive memory cells based on the write command.
Dependencies are inferred from the claim text.