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US 2019/0164602 A1Published application
Memory device and fabrication thereof
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsKuo-Chi TU, Chu-Jie HUANG, Sheng-Hung SHIH, Nai-Chao SU, Wen-Ting CHU
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Abstract
A memory device includes a bottom electrode, a resistance switching layer and a top electrode. The bottom electrode is over a metallization layer embedded in an inter-metal dielectric layer. The bottom electrode has a top surface and a sidewall that extends at an obtuse angle relative to the top surface. The resistance switching layer is over the bottom electrode. The top electrode is over the resistance switching layer.
Claims21
A memory device, comprising:
- a bottom electrode over a metallization layer embedded in an inter-metal dielectric layer, the bottom electrode having a top surface and a sidewall that extends at an obtuse angle relative to the top surface;
- a resistance switching layer over the bottom electrode;
- and
- a top electrode over the resistance switching layer.
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A memory device, comprising:
- a bottom electrode over a metal structure surrounded by a dielectric layer;
- a top electrode above the bottom electrode;
- and
- a resistance switching layer between the bottom electrode and the top electrode, wherein the bottom electrode comprises a top portion tapering towards and in contact with the resistance switching layer.
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19-20. (canceled)
A memory device, comprising:
- a bottom electrode over a metal structure surrounded by a dielectric layer;
- a top electrode above the bottom electrode;
- and
- a resistance switching layer between the bottom electrode and the top electrode, wherein the bottom electrode has a middle portion and an upper portion between the middle portion and the resistance switching layer, and a width of the upper portion is less than a width of the middle portion of the bottom electrode when viewed in cross-section.
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Dependencies are inferred from the claim text.