Memory system for removing memory cell fault and method thereof
AssigneeSK hynix Inc.
InventorWoong-Rae KIM
Life of this patent
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Abstract
A memory system includes: a memory device that includes a plurality of ranks; and a memory controller suitable for deciding a plurality of refresh cycles for respective combinations of the plurality of ranks and at least one program executed onto the memory device based on a performance diagnosis result of each of the ranks when the program is executed, and controlling a refresh operation to be performed onto the ranks based on the decided refresh cycles.
Claims21
A memory system, comprising:
- a memory device that includes a plurality of ranks;
- and
- a memory controller suitable for:
- deciding a plurality of refresh cycles for respective combinations of the plurality of ranks and at least one program executed onto the memory device based on a performance diagnosis result of each of the ranks when the program is executed, and
- controlling a refresh operation to be performed onto the ranks based on the decided refresh cycles.
A method for controlling a memory system including a memory device provided with a plurality of ranks, comprising:
- performing an Error Correction Code (ECC) operation onto plural data stored in, or outputted from, at least one rank of the memory device in parallel;
- deciding a plurality of refresh cycles that respectively correspond to combinations of the plurality of ranks and at least one program executed onto the memory device based on a performance diagnosis result of each of the ranks when the program is executed;
- and
- controlling a refresh operation to be performed onto the at least one rank based on the decided refresh cycles to cure an ECC uncorrectable error while the ECC operation is performed.
A memory system, comprising:
- a memory device including a plurality of ranks;
- and
- a memory controller suitable for diagnosing a performance each of the ranks when the program is executed, to cure an ECC uncorrectable error while the ECC operation is performed,
- wherein a memory controller determines a plurality of refresh cycles, each corresponding to at least one of various combinations regarding the plurality of ranks and at least one program executed onto the memory device, based on a diagnosis result, to control a refresh operation to be performed onto the ranks based on the decided refresh cycles.
Dependencies are inferred from the claim text.