Drive circuit and display apparatus

A drive circuit with multiple shift resisters to output a drive signal based on a plurality of clock signals to each of multiple signal lines sequentially, the multiple signal lines being arranged on a display panel, wherein the multiple shift registers are connected to each other and each comprises a switching element in which a conduction state between two controlled terminals is controlled by a signal to be input to a control terminal,

• wherein each of the multiple shift registers comprising:
• an output switching element, wherein a predetermined clock signal is input to a first controlled terminal, and a second controlled terminal is connected to an output node from which a drive signal is output;
• a first input switching element, wherein a set signal to be high level during a predetermined set period is input to a first controlled terminal, and a second controlled terminal is connected to a control terminal of the output switching element;
• and
• a control unit for performing control to apply a predetermined electric potential to the second controlled terminal of the output switching element when a predetermined control signal is input,
• wherein a low-level electric potential of the predetermined clock signal is lower than a low-level electric potential of the drive signal, and
• the predetermined control signal is input to the control unit when the predetermined clock signal falls to change the electric potential of the output node from high level to low level.