Secure computation system, secure computation device, secure computation method, and program
AssigneeNippon Telegraph and Telephone Corporation
InventorKoki HAMADA
Life of this patent
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AssigneeNippon Telegraph and Telephone Corporation
InventorKoki HAMADA
Estimating the term…
Multiple elements are efficiently read from a secured array. A secure text array <a>=(<a[0]>, . . . , <a[n−1]>) where an array a=(a[0], . . . , a[n−1]) having a size of n is secured, secure text <x> of an integer x that is equal to or higher than 0 and less than n, and in integers i0, . . . , im-1 that are equal to or higher than 0 and less than n are input into an input part 11. A secure shift part 12 secure-shifts the secure text array <a> by <x> to obtain a secure text array <a′>=(<a′[0]>, . . . , <a′[n−1]>) where an array a′=(a′[0], . . . , a′[n−1]) obtained by shifting leftward the array a by x is secured. An array generation part 13 generates a secure text array <b>=(<a′[i0]>, . . . , <a′[im-1]>) from the secure text array <a′>.
A secure computation system comprising three or more secure computation devices,
A secure computation system comprising three or more secure computation devices,
A secure computation device comprises circuitry configured to:
A secure computation device comprises circuitry configured to:
A secure computation method, comprising:
A secure computation method, comprising:
(canceled)
A non-transitory computer readable medium including computer executable instructions that make a secure computation device perform a method comprising:
A non-transitory computer readable medium including computer executable instructions that make a secure computation device perform a method comprising,
Dependencies are inferred from the claim text.