Optimizing headless virtual machine memory management with global translation lookaside buffer shootdown
AssigneeQUALCOMM Incorporated
InventorsTHOMAS ZENG, Samar Asbe, Adam Openshaw
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AssigneeQUALCOMM Incorporated
InventorsTHOMAS ZENG, Samar Asbe, Adam Openshaw
Estimating the term…
Systems, methods, and computer programs are disclosed for optimizing headless virtual memory management in a system on chip (SoC) with global translation lookaside buffer shootdown. The SoC comprises an application processor configured to execute a headful virtual machine and one or more SoC processing devices configured to execute a corresponding headless virtual machine. The method comprises issuing a virtual machine mapping command with a headless virtual machine having a first virtual machine identifier. In response to the virtual machine mapping command, a current value stored in a hardware register in the application processor is saved. The first virtual machine identifier associated with the headless virtual machine is loaded into the hardware register. A translation lookaside buffer (TLB) invalidate command is issued while the first virtual machine identifier is loaded in the hardware register. Upon completion of translation lookaside buffer synchronization, the current value is restored to the hardware register.
A method for virtual memory management in a system on chip (SoC) comprising an application processor executing a headful virtual machine and an SoC processing device executing a headless virtual machine, the method comprising:
A system on chip comprising:
A system on chip comprising:
A computer program product comprising a computer usable medium having a computer readable program code embodied therein, said computer readable program code adapted to be executed to implement a method for optimizing headless virtual memory management in a system on chip (SoC), said method comprising:
Dependencies are inferred from the claim text.