Mission-critical computing architecture
AssigneeIntel Corporation
InventorsBahaa Fahim, Swadesh Choudhary, Rahul Pal, Vedaraman Geetha
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AssigneeIntel Corporation
InventorsBahaa Fahim, Swadesh Choudhary, Rahul Pal, Vedaraman Geetha
Estimating the term…
Operational faults, including transient faults, are detected within computing hardware for mission-critical applications. Operational requests received from a requestor node are to be processed by shared agents to produce corresponding responses. A first request is duplicated to be redundantly processed independently and asynchronously by distinct shared agents to produce redundant counterpart responses including a first redundant response and a second redundant response. The first redundant response is compared against the second redundant response. In response to a match, the redundant responses are merged to produce a single final response to the first request to be read by the requestor node. In response to a non-match, an exception response is performed.
A coherent redundancy controller device, comprising:
A method of manufacturing a central processing unit (CPU) device, the method, comprising:
The method of claim 23, wherein in response to a non-match between the first retried redundant response and the second retried redundant response, the flow control circuitry is to cause the request allocator circuitry to perform a fault-isolation test wherein the first request is redundantly processed independently and asynchronously different ones of the shared agents that were not previously used to redundantly process the first request, to produce tested redundant counterpart responses including a first tested redundant response and a second tested redundant response to be compared against the first tested redundant response.
A computer system having a fault-management architecture, the system, comprising:
Dependencies are inferred from the claim text.