Memory system and method of operating the same
AssigneeSK hynix Inc.
InventorJang Hwan JUN
Life of this patent
Estimating the term…
Abstract
Provided is a memory system and a method of operating the same. The memory system may include a memory device configured to store data; and a memory controller configured to control the memory device such that various operations including a program operation are performed in response to a request from a host, wherein the memory controller comprises: an internal memory configured to store system information; and a central processing unit (CPU) configured to control the memory device such that, when a sudden power off (SPO) occurs during the program operation of the memory device, debugging information related to system information is stored at a location in the memory device where the program operation is interrupted.
Claims19
A memory system, comprising:
- a memory device configured to store data;
- and
- a memory controller configured to control the memory device such that various operations including a program operation are performed in response to a request from a host,
- wherein the memory controller comprises:
- an internal memory configured to store system information;
- and
- a central processing unit (CPU) configured to control the memory device such that, when a sudden power off (SPO) occurs during the program operation of the memory device, debugging information related to system information is stored at a location in the memory device where the program operation is interrupted.
A memory system, comprising:
- a memory device configured to include a plurality of memory blocks in which data is stored;
- and
- a memory controller configured to control the memory device such that debugging information is stored in an open block, among the plurality of memory blocks, on which an operation is interrupted when a sudden power off (SPO) occurs.
A method of operating a memory device, comprising:
- performing a program operation on a selected page of the memory device;
- writing debugging information to the selected page during a boot process of the memory device after a sudden power off (SPO) occurs while the program operation is being performed;
- mapping an address of the selected page in which the debugging information is stored, using a controller;
- reading the debugging information from the selected page in response to the mapped address during a subsequent boot process, using the controller;
- and
- detecting an environment for a previously performed rebuild operation based on the read debugging information, and then reconstructing an environment that existed at a time at which the SPO off has occurred.
A memory system comprising:
- a memory device including a plurality of pages;
- and
- a controller suitable for:
- controlling the memory device to copy data of an (i−1)th page into an (i+1)th page and to store debugging information of the memory system into an (i)th page after a sudden power off while programming the (i)th page;
- and
- using the debugging information to reconstruct an environment for a rebuild operation after a subsequent sudden power off.
Dependencies are inferred from the claim text.