Memory and method of operating the memory
AssigneeSK hynix Inc.
InventorSungeun LEE
Life of this patent
Estimating the term…
Abstract
An error correction method and a chip kill detection method of a memory including a plurality of chips may be provided. The method may include a first data error detection step of detecting whether an error exists in data outputted from the plurality of chips. The method may include a random error correction step of correcting an error occurred in data when it is detected in the first data error detection step that an error exists. The method may include a chip kill detection step of determining, when an error occurs even after the random error correction step, that a chip kill error has occurred, and detecting a chip where the chip kill error has occurred, by correcting the error through assuming one chip among the plurality of chips as a chip where the chip kill error has occurred.
Claims14
A method of operating a memory, the method comprising:
- performing a memory error correction method and a chip kill error detection method on the memory including a plurality of chips coupled to a controller, the memory error correction method and the chip kill error detection method comprising:
- performing, with the controller, a first data error detection step of detecting whether an error exists in data outputted from the plurality of chips to the controller;
- performing, with the controller, a random error correction step of correcting an error occurred in the data when the error is detected in the first data error detection step;
- and
- performing, with the controller, a chip kill detection step of determining, when an error occurs even after the random error correction step, that a chip kill error has occurred, and detecting a chip where the chip kill error has occurred, by correcting the error through assuming one chip among the plurality of chips as a chip where the chip kill error has occurred.
Dependencies are inferred from the claim text.