Apparatus, system, and method of byte addressable and block addressable storage and retrival of data to and from non-volatile storage memory
AssigneeXitore, Inc.
InventorsMike Hossein Amidi, Fariborz Frankie Roohparvar
Life of this patent
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Abstract
A hybrid memory system provides rapid, persistent byte-addressable and block-addressable memory access to a host computer system by providing direct access to a both a volatile byte-addressable memory and a volatile block-addressable memory via the same parallel memory interface. The hybrid memory system also has at least a non-volatile block-addressable memory that allows the system to persist data even through a power-loss state. The hybrid memory system can copy and move data between any of the memories using local memory controllers to free up host system resources for other tasks.
Claims19
A hybrid memory apparatus, comprising:
- a volatile memory logically divided into a volatile byte-addressable memory and a volatile block-addressable memory;
- a non-volatile block-addressable memory;
- a host parallel memory interface that receives commands from a host system bus to exchange data between each of:
- (a) the host system bus and the volatile byte-addressable memory,
- (b) the host system bus and the volatile block-addressable memory,
- (c) the volatile byte-addressable memory and the volatile block-addressable memory, and
- (d) the volatile block-addressable memory and the non-volatile block-addressable memory;
- and
- a traffic controller that manages data traffic as a function of a host address received by the host parallel memory interface.
A method of providing a hybrid byte-addressable/block-addressable memory, comprising:
- providing a volatile memory logically divided into a volatile byte-addressable memory and a volatile block-addressable memory;
- providing a non-volatile block-addressable memory;
- receiving commands from a host system bus via a host parallel memory interface to exchange data between each of:
- (e) the host system bus and the volatile byte-addressable memory,
- (f) the host system bus and the volatile block-addressable memory,
- (g) the volatile byte-addressable memory and the volatile block-addressable memory, and
- (a) the volatile block-addressable memory and the non-volatile block-addressable memory;
- and
- locally managing both incoming and outgoing host data traffic as a function of a host address received through the host parallel memory interface.
Dependencies are inferred from the claim text.